A soft error vulnerability analysis framework for Xilinx FPGAs. - Aitzan Sari; Dimitris Agiakatsikas; Mihalis Psarakis (FPGA, 2014)

Reconfiguration Control Networks for TMR Systems with Module-Based Recovery. - Dimitris Agiakatsikas; Nguyen T. H. Nguyen; Zhuoran Zhao 002; Tong Wu 007; Ediz Cetin; Oliver Diessel; Lingkan Gong (FCCM, 2016)

FMER: A hybrid configuration memory error recovery scheme for highly reliable FPGA SoCs. - Dimitris Agiakatsikas; Ediz Çetin; Oliver Diessel (FPL, 2016)

A Programmable Configuration Controller for fault-tolerant applications. - Lingkan Gong; Tong Wu 007; Nguyen T. H. Nguyen; Dimitris Agiakatsikas; Zhuoran Zhao 002; Ediz Cetin; Oliver Diessel (FPT, 2016)

Dynamic scheduling of voter checks in FPGA-based TMR systems. - Nguyen T. H. Nguyen; Dimitris Agiakatsikas; Ediz Çetin; Oliver Diessel (FPT, 2016)

Fine-grained module-based error recovery in FPGA-based TMR systems. - Zhuoran Zhao 002; Dimitris Agiakatsikas; Nguyen T. H. Nguyen; Ediz Çetin; Oliver Diessel (FPT, 2016)

TLegUp: A TMR Code Generation Tool for SRAM-Based FPGA Applications Using HLS. - Ganghee Lee; Dimitris Agiakatsikas; Tong Wu 007; Ediz Cetin; Oliver Diessel (FCCM, 2017)

Reliable SEU monitoring and recovery using a programmable configuration controller. - Lingkan Gong; Alexander Kroh; Dimitris Agiakatsikas; Nguyen T. H. Nguyen; Ediz Cetin; Oliver Diessel (FPL, 2017)

From C to Fault-Tolerant FPGA-Based Systems. - Dimitris Agiakatsikas; Ganghee Lee; Thomas Mitchell; Ediz Cetin; Oliver Diessel (FCCM, 2018)

Reconfiguration Control Networks for FPGA-based TMR systems with modular error recovery. - Nguyen T. H. Nguyen; Dimitris Agiakatsikas; Zhuoran Zhao 002; Tong Wu 007; Ediz Cetin; Oliver Diessel; Lingkan Gong (Microprocess. Microsystems, 2018)

FMER: An Energy-Efficient Error Recovery Methodology for SRAM-Based FPGA Designs. - Dimitris Agiakatsikas; Ediz Cetin; Oliver Diessel (IEEE Trans. Aerosp. Electron. Syst., 2018)

Fine-Grained Module-Based Error Recovery in FPGA-Based TMR Systems. - Zhuoran Zhao 002; Nguyen T. H. Nguyen; Dimitris Agiakatsikas; Ganghee Lee; Ediz Cetin; Oliver Diessel (ACM Trans. Reconfigurable Technol. Syst., 2018)

High-level synthesis of triple modular redundant FPGA circuits with energy efficient error recovery mechanisms. - Dimitris Agiakatsikas (2019)

The Impact of Hardware Folding on Dependability in Spaceborne FPGA-based Neural Networks. - Ioanna Souvatzoglou; Dimitris Agiakatsikas; George Antonopoulos; Vasileios Vlagkoulis; Aitzan Sari; Athanasios Papadimitriou; Mihalis Psarakis (FPT, 2022)

Evaluation of Xilinx Deep Learning Processing Unit under Neutron Irradiation. - Dimitris Agiakatsikas; Nikos Foutris; Aitzan Sari; Vasileios Vlagkoulis; Ioanna Souvatzoglou; Mihalis Psarakis; Mikel Luján; Maria Kastriotou; Carlo Cazzaniga (CoRR, 2022)

Detecting Hardware Faults in Approximate Adders via Minimum Redundancy. - Ioannis Tsounis; Dimitris Agiakatsikas; Mihalis Psarakis (IOLTS, 2023)

Impact of Voltage Scaling on Soft Errors Susceptibility of Multicore Server CPUs. - Dimitris Agiakatsikas; George Papadimitriou 001; Vasileios Karakostas; Dimitris Gizopoulos; Mihalis Psarakis; Camille Bélanger-Champagne; Ewart Blackmore (MICRO, 2023)

A Methodology for Fault-tolerant Pareto-optimal Approximate Designs of FPGA-based Accelerators. - Ioannis Tsounis; Dimitris Agiakatsikas; Mihalis Psarakis (ACM Trans. Embed. Comput. Syst., 2023)

An Effective TMR Approach for Low-Latency Configurable-Accuracy Adders. - Ioannis Tsounis; Dimitris Agiakatsikas; Mihalis Psarakis (DFT, 2024)

Single Event Effects Assessment of UltraScale+ MPSoC Systems Under Atmospheric Radiation. - Dimitris Agiakatsikas; Nikos Foutris; Aitzan Sari; Vasileios Vlagkoulis; Ioanna Souvatzoglou; Mihalis Psarakis; Ruiqi Ye; John Goodacre; Mikel Luján; Maria Kastriotou; Carlo Cazzaniga; Chris Frost 002 (IEEE Trans. Reliab., 2024)