An effective BIST scheme for carry-save and carry-propagate array multipliers. - Dimitris Gizopoulos; Antonis M. Paschalis; Yervant Zorian (Asian Test Symposium, 1995)

An Effective BIST Scheme for Booth Multipliers. - Dimitris Gizopoulos; Antonis M. Paschalis; Yervant Zorian (ITC, 1995)

Testing combinational iterative logic arrays for realistic faults. - Dimitris Gizopoulos; Dimitris Nikolos; Antonis M. Paschalis (VTS, 1995)

An Effective BIST Scheme for Datapaths. - Dimitris Gizopoulos; Antonis M. Paschalis; Yervant Zorian (ITC, 1996)

An asynchronous totally self-checking two-rail code error indicator. - Nikolaos Gaitanis; Dimitris Gizopoulos; Antonis M. Paschalis; Panagiotis Kostarakis (VTS, 1996)

C-Testable modified-Booth multipliers. - Dimitris Gizopoulos; Dimitris Nikolos; Antonis M. Paschalis; Constantin Halatsis (J. Electron. Test., 1996)

Testing CMOS combinational iterative logic arrays for realistic faults. - Dimitris Gizopoulos; Dimitris Nikolos; Antonis M. Paschalis (Integr., 1996)

Αρχιτεκτονική επαναληπτικών διατάξεων λογικής σε τεχνολογία COS VLSI με τεχνικές σχεδίασης αυξημένης δοκιμαστικόητας - Dimitris Gizopoulos (1996)

An Effective BIST Scheme for Arithmetic Logic Units. - Dimitris Gizopoulos; Antonis M. Paschalis; Yervant Zorian; Mihalis Psarakis (ITC, 1997)

Robust Sequential Fault Testing of Iterative Logic Arrays. - Dimitris Gizopoulos; Mihalis Psarakis; Antonis M. Paschalis (VTS, 1997)

Robustly Testable Array Multipliers under Realistic Sequential Cell Fault Model. - Mihalis Psarakis; Dimitris Gizopoulos; Antonis M. Paschalis; Yervant Zorian (VTS, 1998)

Effective Built-In Self-Test for Booth Multipliers. - Dimitris Gizopoulos; Antonis M. Paschalis; Yervant Zorian (IEEE Des. Test Comput., 1998)

Concurrent Delay Testing in Totally Self-Checking Systems. - Antonis M. Paschalis; Dimitris Gizopoulos; Nikolaos Gaitanis (J. Electron. Test., 1998)

A Totally Self-Checking 1-out-of-3 Code Error Indicator. - Antonis M. Paschalis; Nikolaos Gaitanis; Dimitris Gizopoulos; Panagiotis Kostarakis (J. Electron. Test., 1998)

Test Generation and Fault Simulation for Cell Fault Model using Stuck-at Fault Model based Test Tools. - Mihalis Psarakis; Dimitris Gizopoulos; Antonis M. Paschalis (J. Electron. Test., 1998)

An Effective BIST Architecture for Fast Multiplier Cores. - Antonis M. Paschalis; Nektarios Kranitis; Mihalis Psarakis; Dimitris Gizopoulos; Yervant Zorian (DATE, 1999)

An Effective BIST Architecture for Sequential Fault Testing in Array Multipliers. - Mihalis Psarakis; Antonis M. Paschalis; Dimitris Gizopoulos; Yervant Zorian (VTS, 1999)

An Effective Built-In Self-Test Scheme for Parallel Multipliers. - Dimitris Gizopoulos; Antonis M. Paschalis; Yervant Zorian (IEEE Trans. Computers, 1999)

Effective Low Power BIST for Datapaths. - Dimitris Gizopoulos; Nektarios Kranitis; Mihalis Psarakis; Antonis M. Paschalis; Yervant Zorian (DATE, 2000)

Deterministic Built-In Self -Test for Shifters, Adders and ALUs in Datapaths. - Mihalis Psarakis; Nektarios Kranitis; Dimitris Gizopoulos; Antonis M. Paschalis; Yervant Zorian (LATW, 2000)

Low Power/Energy BIST Scheme for Datapaths. - Dimitris Gizopoulos; Nektarios Kranitis; Mihalis Psarakis; Antonis M. Paschalis; Yervant Zorian (VTS, 2000)

Power-/Energy Efficient BIST Schemes for Processor Data Paths. - Nektarios Kranitis; Dimitris Gizopoulos; Antonis M. Paschalis; Mihalis Psarakis; Yervant Zorian (IEEE Des. Test Comput., 2000)

Sequential Fault Modeling and Test Pattern Generation for CMOS Iterative Logic Arrays. - Mihalis Psarakis; Dimitris Gizopoulos; Antonis M. Paschalis; Yervant Zorian (IEEE Trans. Computers, 2000)

Deterministic software-based self-testing of embedded processor cores. - Antonis M. Paschalis; Dimitris Gizopoulos; Nektarios Kranitis; Mihalis Psarakis; Yervant Zorian (DATE, 2001)

Robust and Low-Cost BIST Architectures for Sequential Fault Testing in Datapath Multipliers. - Mihalis Psarakis; Antonis M. Paschalis; Nektarios Kranitis; Dimitris Gizopoulos; Yervant Zorian (VTS, 2001)

An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths. - Nektarios Kranitis; Antonis M. Paschalis; Dimitris Gizopoulos; Mihalis Psarakis; Yervant Zorian (J. Electron. Test., 2001)

Effective Software Self-Test Methodology for Processor Cores. - Nektarios Kranitis; Antonis M. Paschalis; Dimitris Gizopoulos; Yervant Zorian (DATE, 2002)

Low-Cost Software-Based Self-Testing of RISC Processor Cores. - Nektarios Kranitis; George Xenoulis; Dimitris Gizopoulos; Antonis M. Paschalis; Yervant Zorian (DATE, 2003)

Low Cost Convolutional Code Based Concurrent Error Detection in FSMs. - Konstantinos Rokas; Yiorgos Makris; Dimitris Gizopoulos (DFT, 2003)

Low-Cost, On-Line Software-Based Self-Testing of Embedded Processor Cores. - George Xenoulis; Dimitris Gizopoulos; Nektarios Kranitis; Antonis M. Paschalis (IOLTS, 2003)

Application and Analysis of RT-Level Software-Based Self-Testing for Embedded Processor Cores. - Nektarios Kranitis; George Xenoulis; Antonis M. Paschalis; Dimitris Gizopoulos; Yervant Zorian (ITC, 2003)

Guest editorial - testing and verification of communication system-on-chip devices. - Dimitris Gizopoulos; Robert C. Aitken (IEEE Commun. Mag., 2003)

Easily Testable Cellular Carry Lookahead Adders. - Dimitris Gizopoulos; Mihalis Psarakis; Antonis M. Paschalis; Yervant Zorian (J. Electron. Test., 2003)

Instruction-Based Self-Testing of Processor Cores. - Nektarios Kranitis; Antonis M. Paschalis; Dimitris Gizopoulos; Yervant Zorian (J. Electron. Test., 2003)

Guest Editors' Introduction: Design for Yield and Reliability. - Yervant Zorian; Dimitris Gizopoulos; Cary Vandenberg; Philippe Magarshack (IEEE Des. Test Comput., 2004)

Low-cost, on-line self-testing of processor cores based on embedded software routines. - Dimitris Gizopoulos (Microelectron. J., 2004)

Software-Based Self-Test for Pipelined Processors: A Case Study. - Miltiadis Hatzimihail; Mihalis Psarakis; George Xenoulis; Dimitris Gizopoulos; Antonis M. Paschalis (DFT, 2005)

Accumulator-Based Weighted Pattern Generation. - Ioannis Voyiatzis; Dimitris Gizopoulos; Antonis M. Paschalis (IOLTS, 2005)

Test Generation Methodology for High-Speed Floating Point Adders. - George Xenoulis; Mihalis Psarakis; Dimitris Gizopoulos; Antonis M. Paschalis (IOLTS, 2005)

A concurrent BIST scheme for on-line/off-line testing based on a pre-computed test set. - Ioannis Voyiatzis; Dimitris Gizopoulos; Antonis M. Paschalis; Constantin Halatsis (ITC, 2005)

Software-Based Self-Testing of Embedded Processors. - Nektarios Kranitis; Antonis M. Paschalis; Dimitris Gizopoulos; George Xenoulis (IEEE Trans. Computers, 2005)

Effective software-based self-test strategies for on-line periodic testing of embedded processors. - Antonis M. Paschalis; Dimitris Gizopoulos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

Built-in sequential fault self-testing of array multipliers. - Mihalis Psarakis; Dimitris Gizopoulos; Antonis M. Paschalis (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

A concurrent built-in self-test architecture based on a self-testing RAM. - Ioannis Voyiatzis; Antonis M. Paschalis; Dimitris Gizopoulos; Nektarios Kranitis; Constantin Halatsis (IEEE Trans. Reliab., 2005)

Accumulator-based test generation for robust sequential fault testing in DSP cores in near-optimal time. - Ioannis Voyiatzis; Dimitris Gizopoulos; Antonis M. Paschalis (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Systematic software-based self-test for pipelined processors. - Mihalis Psarakis; Dimitris Gizopoulos; Miltiadis Hatzimihail; Antonis M. Paschalis; Anand Raghunathan; Srivaths Ravi 001 (DAC, 2006)

Optimal periodic testing of intermittent faults in embedded pipelined processor applications. - Nektarios Kranitis; Andreas Merentitis; Nikolaos Laoutaris; George Theodorou; Antonis M. Paschalis; Dimitris Gizopoulos; Constantin Halatsis (DATE, 2006)

A Low-Cost SEU Fault Emulation Platform for SRAM-Based FPGAs. - P. Kenterlis; Nektarios Kranitis; Antonis M. Paschalis; Dimitris Gizopoulos; Mihalis Psarakis (IOLTS, 2006)

New JETTA Editors, 2006. - Bashir M. Al-Hashimi; Dimitris Gizopoulos; Manoj Sachdev; Adit D. Singh (J. Electron. Test., 2006)

Testability Analysis and Scalable Test Generation for High-Speed Floating-Point Units. - George Xenoulis; Mihalis Psarakis; Dimitris Gizopoulos; Antonis M. Paschalis (IEEE Trans. Computers, 2006)

On-Line Periodic Self-Testing of High-Speed Floating-Point Units in Microprocessors. - George Xenoulis; Mihalis Psarakis; Dimitris Gizopoulos; Antonis M. Paschalis (DFT, 2007)

Selecting Power-Optimal SBST Routines for On-Line Processor Testing. - Andreas Merentitis; Nektarios Kranitis; Antonis M. Paschalis; Dimitris Gizopoulos (ETS, 2007)

A Functional Self-Test Approach for Peripheral Cores in Processor-Based SoCs. - Andreas Apostolakis; Mihalis Psarakis; Dimitris Gizopoulos; Antonis M. Paschalis (IOLTS, 2007)

A methodology for detecting performance faults in microprocessors via performance monitoring hardware. - Miltiadis Hatzimihail; Mihalis Psarakis; Dimitris Gizopoulos; Antonis M. Paschalis (ITC, 2007)

Functional Processor-Based Testing of Communication Peripherals in Systems-on-Chip. - Andreas Apostolakis; Mihalis Psarakis; Dimitris Gizopoulos; Antonis M. Paschalis (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Guest Editorial: Special Section on "Autonomous Silicon Validation and Testing of Microprocessors and Microprocessor-Based Systems". - Dimitris Gizopoulos; Robert C. Aitken; Sandip Kundu (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Functional Self-Testing for Bus-Based Symmetric Multiprocessors. - Andreas Apostolakis; Dimitris Gizopoulos; Mihalis Psarakis; Antonis M. Paschalis (DATE, 2008)

Power-Aware Testing and Test Strategies for Low Power Devices. - Dimitris Gizopoulos; Kaushik Roy 001; Patrick Girard 001; Nicola Nicolici; Xiaoqing Wen (DATE, 2008)

Soft Errors: System Effects, Protection Techniques and Case Studies. - Dimitris Gizopoulos; Kaushik Roy 001; Subhasish Mitra; Pia N. Sanda (DATE, 2008)

Low Energy On-Line SBST of Embedded Processors. - Andreas Merentitis; Nektarios Kranitis; Antonis M. Paschalis; Dimitris Gizopoulos (ITC, 2008)

Hybrid-SBST Methodology for Efficient Testing of Processor Cores. - Nektarios Kranitis; Andreas Merentitis; George Theodorou; Antonis M. Paschalis; Dimitris Gizopoulos (IEEE Des. Test Comput., 2008)

An Input Vector Monitoring Concurrent BIST Architecture Based on a Precomputed Test Set. - Ioannis Voyiatzis; Antonis M. Paschalis; Dimitris Gizopoulos; Constantin Halatsis; Frosso S. Makri; Miltiadis Hatzimihail (IEEE Trans. Computers, 2008)

Systematic Software-Based Self-Test for Pipelined Processors. - Dimitris Gizopoulos; Mihalis Psarakis; Miltiadis Hatzimihail; Michail Maniatakos; Antonis M. Paschalis; Anand Raghunathan; Srivaths Ravi 001 (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Exploiting Thread-Level Parallelism in Functional Self-Testing of CMT Processors. - Andreas Apostolakis; Mihalis Psarakis; Dimitris Gizopoulos; Antonis M. Paschalis; Ishwar Parulkar (ETS, 2009)

Enhanced self-configurability and yield in multicore grids. - Eleftherios Kolonis; Michael Nicolaidis; Dimitris Gizopoulos; Mihalis Psarakis; Jacques Henri Collet; Piotr Zajac (IOLTS, 2009)

An Input Vector Monitoring Concurrent BIST scheme exploiting . - Ioannis Voyiatzis; Dimitris Gizopoulos; Antonis M. Paschalis (IOLTS, 2009)

Test Program Generation for Communication Peripherals in Processor-Based SoC Devices. - Andreas Apostolakis; Dimitris Gizopoulos; Mihalis Psarakis; Danilo Ravotto; Matteo Sonza Reorda (IEEE Des. Test Comput., 2009)

Software-Based Self-Testing of Symmetric Shared-Memory Multiprocessors. - Andreas Apostolakis; Dimitris Gizopoulos; Mihalis Psarakis; Antonis M. Paschalis (IEEE Trans. Computers, 2009)

Online Periodic Self-Test Scheduling for Real-Time Processor-Based Systems Dependability Enhancement. - Dimitris Gizopoulos (IEEE Trans. Dependable Secur. Comput., 2009)

Instruction-Based Online Periodic Self-Testing of Microprocessors with Floating-Point Units. - George Xenoulis; Dimitris Gizopoulos; Mihalis Psarakis; Antonis M. Paschalis (IEEE Trans. Dependable Secur. Comput., 2009)

Energy optimal on-line Self-Test of microprocessors in WSN nodes. - Andreas Merentitis; Antonis M. Paschalis; Dimitris Gizopoulos; Nektarios Kranitis (ICCD, 2010)

SBST for on-line detection of hard faults in multiprocessor applications under energy constraints. - Andreas Merentitis; Dionisis Margaris; Nektarios Kranitis; Antonis M. Paschalis; Dimitris Gizopoulos (IOLTS, 2010)

A software-based self-test methodology for in-system testing of processor cache tag arrays. - George Theodorou; Nektarios Kranitis; Antonis M. Paschalis; Dimitris Gizopoulos (IOLTS, 2010)

MT-SBST: Self-test optimization in multithreaded multicore architectures. - Nikos Foutris; Mihalis Psarakis; Dimitris Gizopoulos; Andreas Apostolakis; Xavier Vera; Antonio González 001 (ITC, 2010)

Microprocessor Software-Based Self-Testing. - Mihalis Psarakis; Dimitris Gizopoulos; Edgar E. Sánchez; Matteo Sonza Reorda (IEEE Des. Test Comput., 2010)

Recursive Pseudo-Exhaustive Two-Pattern Generation. - Ioannis Voyiatzis; Dimitris Gizopoulos; Antonis M. Paschalis (IEEE Trans. Very Large Scale Integr. Syst., 2010)

Architectures for online error detection and recovery in multicore processors. - Dimitris Gizopoulos; Mihalis Psarakis; Sarita V. Adve; Pradeep Ramachandran; Siva Kumar Sastry Hari; Daniel J. Sorin; Albert Meixner; Arijit Biswas; Xavier Vera (DATE, 2011)

Towards improved survivability in safety-critical systems. - Jaume Abella 001; Francisco J. Cazorla; Eduardo Quiñones; Arnaud Grasset; Sami Yehia; Philippe Bonnot 001; Dimitris Gizopoulos; Riccardo Mariani; Guillem Bernat (IOLTS, 2011)

A Software-Based Self-Test methodology for on-line testing of processor caches. - George Theodorou; Nektarios Kranitis; Antonis M. Paschalis; Dimitris Gizopoulos (ITC, 2011)

Accelerating microprocessor silicon validation by exposing ISA diversity. - Nikos Foutris; Dimitris Gizopoulos; Mihalis Psarakis; Xavier Vera; Antonio González 001 (MICRO, 2011)

Guest Editors' Introduction: Special Section on Dependable Computer Architecture. - Dimitris Gizopoulos; Shubhendu Mukherjee (IEEE Trans. Computers, 2011)

Chip Self-Organization and Fault Tolerance in Massively Defective Multicore Arrays. - Jacques Henri Collet; Piotr Zajac; Mihalis Psarakis; Dimitris Gizopoulos (IEEE Trans. Dependable Secur. Comput., 2011)

A Software-Based Self-Test methodology for on-line testing of data TLBs. - George Theodorou; Serafeim Chatzopoulos; Nektarios Kranitis; Antonis M. Paschalis; Dimitris Gizopoulos (ETS, 2012)

Low Energy Online Self-Test of Embedded Processors in Dependable WSN Nodes. - Andreas Merentitis; Nektarios Kranitis; Antonis M. Paschalis; Dimitris Gizopoulos (IEEE Trans. Dependable Secur. Comput., 2012)

Efficient Memory Repair Using Cache-Based Redundancy. - Nicholas Axelos; Kiamal Z. Pekmestzi; Dimitris Gizopoulos (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Accumulator Based 3-Weight Pattern Generation. - Antonis M. Paschalis; Ioannis Voyiatzis; Dimitris Gizopoulos (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Reliability challenges of real-time systems in forthcoming technology nodes. - Said Hamdioui; Michael Nicolaidis; Dimitris Gizopoulos; Arnaud Grasset; Guido Groeseneken; Philippe Bonnot 001 (DATE, 2013)

Assessing the impact of hard faults in performance components of modern microprocessors. - Nikos Foutris; Dimitris Gizopoulos; John Kalamatianos; Vilas Sridharan (ICCD, 2013)

Measuring the performance impact of permanent faults in modern microprocessor architectures. - Nikos Foutris; Dimitris Gizopoulos; John Kalamatianos; Vilas Sridharan (IOLTS, 2013)

Online error detection in multiprocessor chips: A test scheduling study. - Manolis Kaliorakis; Nikos Foutris; Dimitris Gizopoulos; Mihalis Psarakis; Antonis M. Paschalis (IOLTS, 2013)

The functional and performance tolerance of GPUs to permanent faults in registers. - Sotiris Tselonis; Vasilis Dimitsas; Dimitris Gizopoulos (IOLTS, 2013)

Deconfigurable microprocessor architectures for silicon debug acceleration. - Nikos Foutris; Dimitris Gizopoulos; Xavier Vera; Antonio González 001 (ISCA, 2013)

Combining checkpointing and scrubbing in FPGA-based real-time systems. - Aitzan Sari; Mihalis Psarakis; Dimitris Gizopoulos (VTS, 2013)

Guest Editorial - Special Issue on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN). - Dimitris Gizopoulos; Said Hamdioui; Hans A. R. Manhaeve (J. Electron. Test., 2013)

Software-Based Self Test Methodology for On-Line Testing of L1 Caches in Multithreaded Multicore Architectures. - Giorgos Theodorou; Nektarios Kranitis; Antonis M. Paschalis; Dimitris Gizopoulos (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Cross-Layer Early Reliability Evaluation for the Computing cOntinuum. - Stefano Di Carlo; Alessandro Vallero; Dimitris Gizopoulos; Giorgio Di Natale; Arnaud Grasset; Riccardo Mariani; Frank Reichenbach (DSD, 2014)

Cross-layer early reliability evaluation: Challenges and promises. - Stefano Di Carlo; Alessandro Vallero; Dimitris Gizopoulos; Giorgio Di Natale; Antonio González 001; Ramon Canal; Riccardo Mariani; M. Pipponzi; Arnaud Grasset; Philippe Bonnot 001; Frank Reichenbach; Gulzaib Rafiq; et al. (IOLTS, 2014)

Versatile architecture-level fault injection framework for reliability evaluation: A first report. - Nikos Foutris; Manolis Kaliorakis; Sotiris Tselonis; Dimitris Gizopoulos (IOLTS, 2014)

Power-aware optimization of software-based self-test for L1 caches in microprocessors. - George Theodorou; Nektarios Kranitis; Antonis M. Paschalis; Dimitris Gizopoulos (IOLTS, 2014)

Special session 8B - Panel: In-field testing of SoC devices: Which solutions by which players? - Jacob A. Abraham; Xinli Gu; Teresa MacLaurin; Janusz Rajski; Paul G. Ryan; Dimitris Gizopoulos; Matteo Sonza Reorda (VTS, 2014)

Accelerated online error detection in many-core microprocessor architectures. - Manolis Kaliorakis; Mihalis Psarakis; Nikos Foutris; Dimitris Gizopoulos (VTS, 2014)

Fast quantum modular exponentiation architecture for Shor's factoring algorithm. - Archimedes Pavlidis; Dimitris Gizopoulos (Quantum Inf. Comput., 2014)

Software-Based Self-Test for Small Caches in Microprocessors. - Georgios Theodorou; Nektarios Kranitis; Antonis M. Paschalis; Dimitris Gizopoulos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Accelerated microarchitectural Fault Injection-based reliability assessment. - Manolis Kaliorakis; Sotiris Tselonis; Athanasios Chatzidimitriou; Dimitris Gizopoulos (DFTS, 2015)

A Bayesian model for system level reliability estimation. - Alessandro Vallero; Alessandro Savino; Sotiris Tselonis; Nikos Foutris; Manolis Kaliorakis; Gianfranco Politano; Dimitris Gizopoulos; Stefano Di Carlo (ETS, 2015)

Differential Fault Injection on Microarchitectural Simulators. - Manolis Kaliorakis; Sotiris Tselonis; Athanasios Chatzidimitriou; Nikos Foutris; Dimitris Gizopoulos (IISWC, 2015)

The future of fault tolerant computing. - Jacob A. Abraham; Ravishankar K. Iyer; Dimitris Gizopoulos; Dan Alexandrescu; Yervant Zorian (IOLTS, 2015)

Bayesian network early reliability evaluation analysis for both permanent and transient faults. - Alessandro Vallero; Alessandro Savino; Sotiris Tselonis; Nikos Foutris; Manolis Kaliorakis; Gianfranco Politano; Dimitris Gizopoulos; Stefano Di Carlo (IOLTS, 2015)

Efficient parallelization of the Discrete Wavelet Transform algorithm using memory-oblivious optimizations. - Anastasis Keliris; Vasilis Dimitsas; Olympia Kremmyda; Dimitris Gizopoulos; Michail Maniatakos (PATMOS, 2015)

Dependable Multicore Architectures at Nanoscale: The View From Europe. - Marco Ottavi; Salvatore Pontarelli; Dimitris Gizopoulos; Cristiana Bolchini; Maria K. Michael; Lorena Anghel; Mehdi Baradaran Tahoori; Antonis M. Paschalis; Pedro Reviriego; Oliver Bringmann 001; Viacheslav Izosimov; Hans A. R. Manhaeve; et al. (IEEE Des. Test, 2015)

Cross-layer reliability evaluation, moving from the hardware architecture to the system level: A CLERECO EU project overview. - Alessandro Vallero; Sotiris Tselonis; Nikos Foutris; Manolis Kaliorakis; Maha Kooli; Alessandro Savino; Gianfranco Politano; Alberto Bosio; Giorgio Di Natale; Dimitris Gizopoulos; Stefano Di Carlo (Microprocess. Microsystems, 2015)

Unveiling difficult bugs in address translation caching arrays for effective post-silicon validation. - George Papadimitriou 001; Dimitris Gizopoulos; Athanasios Chatzidimitriou; Tom Kolan; Anatoly Koyfman; Ronny Morad; Vitali Sokhin (ICCD, 2016)

ISA-independent post-silicon validation for the address translation mechanisms of modern microprocessors. - George Papadimitriou 001; Athanasios Chatzidimitriou; Dimitris Gizopoulos; Ronny Morad (IOLTS, 2016)

RIIF-2: Toward the next generation reliability information interchange format. - Alessandro Savino; Stefano Di Carlo; Alessandro Vallero; Gianfranco Politano; Dimitris Gizopoulos; Adrian Evans (IOLTS, 2016)

Anatomy of microarchitecture-level reliability assessment: Throughput and accuracy. - Athanasios Chatzidimitriou; Dimitris Gizopoulos (ISPASS, 2016)

GUFI: A framework for GPUs reliability assessment. - Sotiris Tselonis; Dimitris Gizopoulos (ISPASS, 2016)

Cross-layer system reliability assessment framework for hardware faults. - Alessandro Vallero; Alessandro Savino; Gianfranco Politano; Stefano Di Carlo; Athanasios Chatzidimitriou; Sotiris Tselonis; Manolis Kaliorakis; Dimitris Gizopoulos; Marc Riera; Ramon Canal; Antonio González 001; Maha Kooli; et al. (ITC, 2016)

Faults in data prefetchers: Performance degradation and variability. - Nikos Foutris; Athanasios Chatzidimitriou; Dimitris Gizopoulos; John Kalamatianos; Vilas Sridharan (VTS, 2016)

Microprocessor reliability-performance tradeoffs assessment at the microarchitecture level. - Sotiris Tselonis; Manolis Kaliorakis; Nikos Foutris; George Papadimitriou 001; Dimitris Gizopoulos (VTS, 2016)

Hierarchical Synthesis of Quantum and Reversible Architectures. - Archimedes Pavlidis; Dimitris Gizopoulos (Int. J. Parallel Program., 2016)

RT Level vs. Microarchitecture-Level Reliability Assessment: Case Study on ARM(R) Cortex(R)-A9 CPU. - Athanasios Chatzidimitriou; Manolis Kaliorakis; Dimitris Gizopoulos; Maurizio Iacaruso; Mauro Pipponzi; Riccardo Mariani; Stefano Di Carlo (DSN Workshops, 2017)

Voltage margins identification on commercial x86-64 multicore microprocessors. - George Papadimitriou 001; Manolis Kaliorakis; Athanasios Chatzidimitriou; Charalampos Magdalinos; Dimitris Gizopoulos (IOLTS, 2017)

SIFI: AMD southern islands GPU microarchitectural level fault injector. - Alessandro Vallero; Dimitris Gizopoulos; Stefano Di Carlo (IOLTS, 2017)

MeRLiN: Exploiting Dynamic Instruction Behavior for Fast and Accurate Microarchitecture Level Reliability Assessment. - Manolis Kaliorakis; Dimitris Gizopoulos; Ramon Canal; Antonio González 001 (ISCA, 2017)

Microarchitecture level reliability comparison of modern GPU designs: First findings. - Alessandro Vallero; Stefano Di Carlo; Sotiris Tselonis; Dimitris Gizopoulos (ISPASS, 2017)

Harnessing voltage margins for energy efficiency in multicore CPUs. - George Papadimitriou 001; Manolis Kaliorakis; Athanasios Chatzidimitriou; Dimitris Gizopoulos; Peter Lawthers; Shidhartha Das (MICRO, 2017)

Performance-aware reliability assessment of heterogeneous chips. - Athanasios Chatzidimitriou; Manolis Kaliorakis; Sotiris Tselonis; Dimitris Gizopoulos (VTS, 2017)

Error-Resilient Server Ecosystems for Edge and Cloud Datacenters. - Georgios Karakonstantis; Dimitrios S. Nikolopoulos; Dimitris Gizopoulos; Pedro Trancoso; Yiannakis Sazeides; Christos D. Antonopoulos; Srikumar Venugopal; Shidhartha Das (Computer, 2017)

An energy-efficient and error-resilient server ecosystem exceeding conservative scaling limits. - Georgios Karakonstantis; Konstantinos Tovletoglou; Lev Mukhanov; Hans Vandierendonck; Dimitrios S. Nikolopoulos; Peter Lawthers; Panos K. Koutsovasilis; Manolis Maroudas; Christos D. Antonopoulos; Christos Kalogirou; Nikolaos Bellas; Spyros Lalis; et al. (DATE, 2018)

Measuring and Exploiting Guardbands of Server-Grade ARMv8 CPU Cores and DRAMs. - Konstantinos Tovletoglou; Lev Mukhanov; Georgios Karakonstantis; Athanasios Chatzidimitriou; George Papadimitriou 001; Manolis Kaliorakis; Dimitris Gizopoulos; Zacharias Hadjilambrou; Yiannakis Sazeides; Alejandro Lampropulos; Shidhartha Das; Phong Vo (DSN Workshops, 2018)

Analysis and Characterization of Ultra Low Power Branch Predictors. - Athanasios Chatzidimitriou; George Papadimitriou 001; Dimitris Gizopoulos; Shrikanth Ganapathy; John Kalamatianos (ICCD, 2018)

HealthLog Monitor: A Flexible System-Monitoring Linux Service. - Athanasios Chatzidimitriou; George Papadimitriou 001; Dimitris Gizopoulos (IOLTS, 2018)

Micro-Viruses for Fast System-Level Voltage Margins Characterization in Multicore CPUs. - George Papadimitriou 001; Athanasios Chatzidimitriou; Manolis Kaliorakis; Yannos Vastakis; Dimitris Gizopoulos (ISPASS, 2018)

Multi-faceted microarchitecture level reliability characterization for NVIDIA and AMD GPUs. - Alessandro Vallero; Sotiris Tselonis; Dimitris Gizopoulos; Stefano Di Carlo (VTS, 2018)

Statistical Analysis of Multicore CPUs Operation in Scaled Voltage Conditions. - Manolis Kaliorakis; Athanasios Chatzidimitriou; George Papadimitriou 001; Dimitris Gizopoulos (IEEE Comput. Archit. Lett., 2018)

Demystifying Soft Error Assessment Strategies on ARM CPUs: Microarchitectural Fault Injection vs. Neutron Beam Experiments. - Athanasios Chatzidimitriou; Pablo Bodmann; George Papadimitriou 001; Dimitris Gizopoulos; Paolo Rech (DSN, 2019)

Adaptive Voltage/Frequency Scaling and Core Allocation for Balanced Energy and Performance on Multicore CPUs. - George Papadimitriou 001; Athanasios Chatzidimitriou; Dimitris Gizopoulos (HPCA, 2019)

Multi-Bit Upsets Vulnerability Analysis of Modern Microprocessors. - Athanasios Chatzidimitriou; George Papadimitriou 001; Christos Gavanas; George Katsoridas; Dimitris Gizopoulos (IISWC, 2019)

Modern Hardware Margins: CPUs, GPUs, FPGAs Recent System-Level Studies. - Dimitris Gizopoulos; George Papadimitriou 001; Athanasios Chatzidimitriou; Vijay Janapa Reddi; Behzad Salami 001; Osman S. Unsal; Adrián Cristal Kestelman; Jingwen Leng (IOLTS, 2019)

Assessing the Effects of Low Voltage in Branch Prediction Units. - Athanasios Chatzidimitriou; George Papadimitriou 001; Dimitris Gizopoulos; Shrikanth Ganapathy; John Kalamatianos (ISPASS, 2019)

SyRA: Early System Reliability Analysis for Cross-Layer Soft Errors Resilience in Memory Arrays of Microprocessor Systems. - Alessandro Vallero; Alessandro Savino; Athanasios Chatzidimitriou; Manolis Kaliorakis; Maha Kooli; Marc Riera; Martí Anglada; Giorgio Di Natale; Alberto Bosio; Ramon Canal; Antonio González 001; Dimitris Gizopoulos; et al. (IEEE Trans. Computers, 2019)

rACE: Reverse-Order Processor Reliability Analysis. - Athanasios Chatzidimitriou; Dimitris Gizopoulos (DATE, 2020)

Cross-Layer Soft-Error Resilience Analysis of Computing Systems. - Alberto Bosio; Ramon Canal; Stefano Di Carlo; Dimitris Gizopoulos; Alessandro Savino (DSN (Supplements), 2020)

Exceeding Conservative Limits: A Consolidated Analysis on Modern Hardware Margins. - George Papadimitriou 001; Athanasios Chatzidimitriou; Dimitris Gizopoulos; Vijay Janapa Reddi; Jingwen Leng; Behzad Salami 001; Osman S. Unsal; Adrián Cristal Kestelman (CoRR, 2020)

Characterizing Soft Error Vulnerability of CPUs Across Compiler Optimizations and Microarchitectures. - George Papadimitriou 001; Dimitris Gizopoulos (IISWC, 2021)

Boosting Microprocessor Efficiency: Circuit- and Workload-Aware Assessment of Timing Errors. - Ioannis Tsiokanos; George Papadimitriou 001; Dimitris Gizopoulos; Georgios Karakonstantis (IISWC, 2021)

Demystifying the System Vulnerability Stack: Transient Fault Effects Across the Layers. - George Papadimitriou 001; Dimitris Gizopoulos (ISCA, 2021)

The Impact of SoC Integration and OS Deployment on the Reliability of Arm Processors. - Pablo Bodmann; George Papadimitriou 001; Dimitris Gizopoulos; Paolo Rech (ISPASS, 2021)

A System-Level Voltage/Frequency Scaling Characterization Framework for Multicore CPUs. - George Papadimitriou 001; Manolis Kaliorakis; Athanasios Chatzidimitriou; Dimitris Gizopoulos; Greg Favor; Kumar Sankaran; Shidhartha Das (CoRR, 2021)

Towards Accurate Performance Modeling of RISC-V Designs. - Odysseas Chatzopoulos; George-Marios Fragkoulis; George Papadimitriou 001; Dimitris Gizopoulos (CoRR, 2021)

gpuFI-4: A Microarchitecture-Level Framework for Assessing the Cross-Layer Resilience of Nvidia GPUs. - Dimitris Sartzetakis; George Papadimitriou 001; Dimitris Gizopoulos (ISPASS, 2022)

IDLD: Instantaneous Detection of Leakage and Duplication of Identifiers used for Register Renaming. - Yiannakis Sazeides; Alex Gerber; Ron Gabor; Arkady Bramnik; George Papadimitriou 001; Dimitris Gizopoulos; Chrysostomos Nicopoulos; Giorgos Dimitrakopoulos; Karyofyllis Patsidis (MICRO, 2022)

Soft Error Effects on Arm Microprocessors: Early Estimations versus Chip Measurements. - Pablo Bodmann; George Papadimitriou 001; Rubens Luiz Rech Junior; Dimitris Gizopoulos; Paolo Rech (IEEE Trans. Computers, 2022)

The Impact of CPU Voltage Margins on Power-Constrained Execution. - Panos K. Koutsovasilis; Christos D. Antonopoulos; Nikolaos Bellas; Spyros Lalis; George Papadimitriou 001; Athanasios Chatzidimitriou; Dimitris Gizopoulos (IEEE Trans. Sustain. Comput., 2022)

On the Evaluation of the Total-Cost-of-Ownership Trade-Offs in Edge vs Cloud Deployments: A Wireless-Denial-of-Service Case Study. - Panagiota Nikolaou; Yiannakis Sazeides; Alejandro Lampropulos; Denis Guilhot; Andrea Bartoli; George Papadimitriou 001; Athanasios Chatzidimitriou; Dimitris Gizopoulos; Konstantinos Tovletoglou; Lev Mukhanov; Georgios Karakonstantis (IEEE Trans. Sustain. Comput., 2022)

VITAMIN-V: Virtual Environment and Tool-Boxing for Trustworthy Development of RISC-V Based Cloud Services. - Ramon Canal; Cristiano Pegoraro Chenet; Aggelos Arelakis; José-María Arnau; Josep Lluís Berral; Aaron Call; Stefano Di Carlo; Juan José Costa; Dimitris Gizopoulos; Vasileios Karakostas; Francesco Lubrano; Konstantinos Nikas; et al. (DSD, 2023)

Validation, Verification, and Testing (VVT) of future RISC-V powered cloud infrastructures: the Vitamin-V Horizon Europe Project perspective. - Marti Alonso; David Andreu 003; Ramon Canal; Stefano Di Carlo; Cristiano Pegoraro Chenet; Juanjo Costa; Andreu Girones; Dimitris Gizopoulos; Vasileios Karakostas; Beatriz Otero; George Papadimitriou 001; Eva Rodríguez; et al. (ETS, 2023)

EUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS. - Fabio Pavanello; Cédric Marchand 002; Ian O'Connor; Régis Orobtchouk; Fabien Mandorlo; Xavier Letartre; Sébastien Cueff; Elena-Ioana Vatajelu; Giorgio Di Natale; Benoit Cluzel; Aurelien Coillet; Benoît Charbonnier; et al. (ETS, 2023)

AVGI: Microarchitecture-Driven, Fast and Accurate Vulnerability Assessment. - George Papadimitriou 001; Dimitris Gizopoulos (HPCA, 2023)

Energy Efficiency of Out-of-Order CPUs: Comparative Study and Microarchitectural Hotspot Characterization of RISC-V Designs. - Odysseas Chatzopoulos; George Papadimitriou 001; Wing Shek Wong; Dimitris Gizopoulos (IISWC, 2023)

Silent Data Corruptions: The Stealthy Saboteurs of Digital Integrity. - George Papadimitriou 001; Dimitris Gizopoulos; Harish Dattatraya Dixit; Sriram Sankar (IOLTS, 2023)

Estimating the Failures and Silent Errors Rates of CPUs Across ISAs and Microarchitectures. - Dimitris Gizopoulos; George Papadimitriou 001; Odysseas Chatzopoulos (ITC, 2023)

Impact of Voltage Scaling on Soft Errors Susceptibility of Multicore Server CPUs. - Dimitris Agiakatsikas; George Papadimitriou 001; Vasileios Karakostas; Dimitris Gizopoulos; Mihalis Psarakis; Camille Bélanger-Champagne; Ewart Blackmore (MICRO, 2023)

Silent Data Errors: Sources, Detection, and Modeling. - Adit D. Singh; Sreejit Chakravarty; George Papadimitriou 001; Dimitris Gizopoulos (VTS, 2023)

Soft Error Effects on Arm Microprocessors: Early Estimations Versus Chip. - Pablo R. Bodmann; George Papadimitriou 001; Rubens Luiz Rech Junior; Dimitris Gizopoulos; Paolo Rech (Computer, 2023)

NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS. - Fabio Pavanello; Cédric Marchand 002; Ian O'Connor; Régis Orobtchouk; Fabien Mandorlo; Xavier Letartre; Sébastien Cueff; Elena-Ioana Vatajelu; Giorgio Di Natale; Benoit Cluzel; Aurelien Coillet; Benoît Charbonnier; et al. (CoRR, 2023)

Vitamin-V: Virtual Environment and Tool-boxing for Trustworthy Development of RISC-V based Cloud Services. - Aggelos Arelakis; José-María Arnau; Josep Lluis Berral; Aaron Call; Ramon Canal; Stefano Di Carlo; Juan José Costa; Dimitris Gizopoulos; Vasileios Karakostas; Francesco Lubrano; Konstantinos Nikas; Yiannis Nikolakopoulos; et al. (CoRR, 2023)

Anatomy of On-Chip Memory Hardware Fault Effects Across the Layers. - George Papadimitriou 001; Dimitris Gizopoulos (IEEE Trans. Emerg. Top. Comput., 2023)

Silent Data Corruptions: Microarchitectural Perspectives. - George Papadimitriou 001; Dimitris Gizopoulos (IEEE Trans. Computers, 2023)

GPU Reliability Assessment: Insights Across the Abstraction Layers. - Lishan Yang; George Papadimitriou 001; Dimitris Sartzetakis; Adwait Jog; Evgenia Smirni; Dimitris Gizopoulos (CLUSTER, 2024)

Invited: Neuromorphic Architectures Based on Augmented Silicon Photonics Platforms. - Matej Hejda; Federico Marchesin; George Papadimitriou 001; Dimitris Gizopoulos; Benoît Charbonnier; Régis Orobtchouk; Peter Bienstman; Thomas Van Vaerenbergh; Fabio Pavanello (DAC, 2024)

Security Layers and Related Services within the Horizon Europe NEUROPULS Project. - Fabio Pavanello; Cédric Marchand 002; Paul Jiménez; Xavier Letartre; Ricardo Chaves; Niccolò Marastoni; Alberto Lovato; Mariano Ceccato; George Papadimitriou 001; Vasileios Karakostas; Dimitris Gizopoulos; Roberta Bardini; et al. (DATE, 2024)

Special Session: Security and RAS in the Computing Continuum. - Marti Alonso; David Andreu 003; Ramon Canal; Stefano Di Carlo; Odysseas Chatzopoulos; Cristiano Pegoraro Chenet; Juanjo Costa; Andreu Girones; Dimitris Gizopoulos; George Papadimitriou 001; Enric Morancho; Beatriz Otero; et al. (DFT, 2024)

Silent Data Corruptions in Computing Systems: Early Predictions and Large-Scale Measurements. - Dimitris Gizopoulos; George Papadimitriou 001; Odysseas Chatzopoulos; Nikos Karystinos; Harish Dattatraya Dixit; Sriram Sankar (ETS, 2024)

Gem5-MARVEL: Microarchitecture-Level Resilience Analysis of Heterogeneous SoC Architectures. - Odysseas Chatzopoulos; George Papadimitriou 001; Vasileios Karakostas; Dimitris Gizopoulos (HPCA, 2024)

Silent Data Corruptions in Computing: Understand and Quantify. - Thiago Macieira; Sankar Gurumurthy; Sudhanva Gurumurthi; Amr Haggag; George Papadimitriou 001; Dimitris Gizopoulos (IOLTS, 2024)

Harpocrates: Breaking the Silence of CPU Faults through Hardware-in-the-Loop Program Generation. - Nikos Karystinos; Odysseas Chatzopoulos; George-Marios Fragkoulis; George Papadimitriou 001; Dimitris Gizopoulos; Sudhanva Gurumurthi (ISCA, 2024)

SimPoint-Based Microarchitectural Hotspot & Energy-Efficiency Analysis of RISC-V OoO CPUs. - Odysseas Chatzopoulos; Maria Trakosa; George Papadimitriou 001; Wing Shek Wong; Dimitris Gizopoulos (ISPASS, 2024)

Probing Weaknesses in GPU Reliability Assessment: A Cross-Layer Approach. - Lishan Yang; George Papadimitriou 001; Dimitrios Sartzetakis; Adwait Jog; Evgenia Smirni; Dimitris Gizopoulos (ISPASS, 2024)

DRAM Errors and Cosmic Rays: Space Invaders or Science Fiction? - Isaac Boixaderas; Jorge Amaya; Sergi Moré; Javier Bartolome; David Vicente; Osman S. Unsal; Dimitris Gizopoulos; Paul M. Carpenter; Petar Radojkovic; Eduard Ayguadé (SBAC-PAD, 2024)

Vitamin-V: Expanding Open-Source RISC-V Cloud Environments. - Ramon Canal; Stefano Di Carlo; Dimitris Gizopoulos; Alberto Scionti; Francesco Lubrano; Josep Lluis Berral; Aaron Call; Diego Marron; Konstantinos Nikas; Dionisios N. Pnevmatikatos; Daniel Raho; Alvise Rigo; et al. (CoRR, 2024)

Security and RAS in the Computing Continuum. - Marti Alonso; David Andreu 003; Ramon Canal; Stefano Di Carlo; Odysseas Chatzopoulos; Cristiano Pegoraro Chenet; Juanjo Costa; Andreu Girones; Dimitris Gizopoulos; George Papadimitriou 001; Enric Morancho; Beatriz Otero; et al. (CoRR, 2024)

Advancing Cloud Computing Capabilities on gem5 by Implementing the RISC-V Hypervisor Extension. - George-Marios Fragkoulis; Nikos Karystinos; George Papadimitriou 001; Dimitris Gizopoulos (CoRR, 2024)

From Gates to SDCs: Understanding Fault Propagation Through the Compute Stack. - Odysseas Chatzopoulos; George Papadimitriou 001; Dimitris Gizopoulos; Harish Dattatraya Dixit; Sriram Sankar (DATE, 2025)

Veritas - Demystifying Silent Data Corruptions: μArch-Level Modeling and Fleet Data of Modern x86 CPUs. - Odysseas Chatzopoulos; Nikos Karystinos; George Papadimitriou 001; Dimitris Gizopoulos; Harish Dattatraya Dixit; Sriram Sankar (HPCA, 2025)

Accurate Analysis of Silent Data Corruptions in Programmable AI Accelerator Microarchitectures. - Odysseas Chatzopoulos; Maria Trakosa; Dimitris Gizopoulos (IOLTS, 2025)

Evaluating ECC for Cache Reliability Under Multi-Bit Upsets: A Design Space Exploration. - Foteini Kotsimpou; George Papadimitriou 001; Dimitris Gizopoulos (IOLTS, 2025)

NAVIgator: Exploring the Voltage Limits of AMD NAVI GPUs for Energy Efficient Computing. - Maria Trakosa; Odysseas Chatzopoulos; George Papadimitriou 001; Dimitris Gizopoulos (IOLTS, 2025)

The Dark Side of Computing: Silent Data Corruptions. - Dimitris Gizopoulos (Computer, 2025)