A new scheme to compute variable orders for binary decision diagrams. - Jawahar Jain; James R. Bitner; Dinos Moundanos; Jacob A. Abraham; Donald S. Fussell (Great Lakes Symposium on VLSI, 1994)

Automatic extraction of the control flow machine and application to evaluating coverage of verification vectors. - Yatin Vasant Hoskote; Dinos Moundanos; Jacob A. Abraham (ICCD, 1995)

Efficient variable ordering and partial representation algorithm. - Jawahar Jain; Dinos Moundanos; James R. Bitner; Jacob A. Abraham; Donald S. Fussell; Don E. Ross (VLSI Design, 1995)

Distributed Binary Decision Diagrams for Verification of Large Circuit. - Prakash Arunachalam; Craig M. Chase; Dinos Moundanos (ICCD, 1996)

A Unified Framework for Design Validation and Manufacturing Test. - Dinos Moundanos; Jacob A. Abraham; Yatin Vasant Hoskote (ITC, 1996)

Using Verification Technology for Validation Coverage Analysis and Test Generation. - Dinos Moundanos; Jacob A. Abraham (VTS, 1998)

Abstraction Techniques for Validation Coverage Analysis and Test Generation. - Dinos Moundanos; Jacob A. Abraham; Yatin Vasant Hoskote (IEEE Trans. Computers, 1998)

Formal Checking of Properties in Complex Systems Using Abstractions. - Dinos Moundanos; Jacob A. Abraham (Great Lakes Symposium on VLSI, 1999)

On Design Validation Using Verification Technology. - Dinos Moundanos; Jacob A. Abraham (J. Electron. Test., 1999)

Analysis of composition complexity and how to obtain smaller canonical graphs. - Jawahar Jain; K. Mohanram; Dinos Moundanos; Ingo Wegener; Yuan Lu 004 (DAC, 2000)