Configurable baseband digital transceiver for Gbps wireless 60 GHz communications. - Dionysios Diamantopoulos; Panagiotis Galiatsatos; Athanasios Karachalios; George Lentaris; Dionisios I. Reisis; Dimitrios Soudris (ICECS, 2011)

Design and experimentation with low-power morphable multipliers. - Efstathios Sotiriou-Xanthopoulos; Dionysios Diamantopoulos; George Economakos; Dimitrios Soudris (ICECS, 2011)

SPARTAN project: Efficient implementation of computer vision algorithms onto reconfigurable platform targeting to space applications. - Kostas Siozios; Dionysios Diamantopoulos; Ioannis Kostavelis; Evangelos Boukas; Lazaros Nalpantidis; Dimitrios Soudris; Antonios Gasteratos; Marcos Avilés; Iraklis Anagnostopoulos (ReCoSoC, 2011)

Thermal optimization for micro-architectures through selective block replication. - Dionysios Diamantopoulos; Kostas Siozios; Sotirios Xydis; Dimitrios Soudris (ICSAMOS, 2011)

SPARTAN project: On profiling computer vision algorithms for rover navigation. - Dionysios Diamantopoulos; Kostas Siozios; George Lentaris; Dimitrios Soudris; Marcos Avilés Rodrigálvarez (AHS, 2012)

Hardware implementation of stereo correspondence algorithm for the ExoMars mission. - George Lentaris; Dionysios Diamantopoulos; Kostas Siozios; Dimitrios Soudris; Marcos Avilés Rodrigálvarez (FPL, 2012)

FPGA-based path-planning of high mobility rover for future planetary missions. - George Lentaris; Dionysios Diamantopoulos; G. Stamoulias; Kostas Siozios; Dimitrios Soudris; Marcos Avilés Rodrigálvarez (ICECS, 2012)

A Systematic Methodology for Reliability Improvements on SoC-Based Software Defined Radio Systems. - Dionysios Diamantopoulos; Kostas Siozios; Sotirios Xydis; Dimitrios Soudris (VLSI Design, 2012)

HVSoCs: A Framework for Rapid Prototyping of 3-D Hybrid Virtual System-on-Chips. - Dionysios Diamantopoulos; Kostas Siozios; Efstathios Sotiriou-Xanthopoulos; George Economakos; Dimitrios Soudris (IPDPS Workshops, 2013)

A new design paradigm for floating point DSP applications based on ESL/HLS and FPGAs? - Dionysios Diamantopoulos; Christoforos E. Economakos; Dimitrios Soudris; George Economakos (ISSPIT, 2013)

Using high-level synthesis to build memory and datapath optimized DSP accelerators. - Dionysios Diamantopoulos; George Economakos; Dionysios I. Reisis (ICECS, 2014)

SPARTAN: Developing a Vision System for Future Autonomous Space Exploration Robots. - Ioannis Kostavelis; Lazaros Nalpantidis; Evangelos Boukas; Marcos Avilés Rodrigálvarez; Ioannis Stamoulias; George Lentaris; Dionysios Diamantopoulos; Kostas Siozios; Dimitrios Soudris; Antonios Gasteratos (J. Field Robotics, 2014)

A framework for rapid evaluation of heterogeneous 3-D NoC architectures. - Efstathios Sotiriou-Xanthopoulos; Dionysios Diamantopoulos; Kostas Siozios; George Economakos; Dimitrios Soudris (Microprocess. Microsystems, 2014)

Plug&Chip: A Framework for Supporting Rapid Prototyping of 3D Hybrid Virtual SoCs. - Dionysios Diamantopoulos; Efstathios Sotiriou-Xanthopoulos; Kostas Siozios; George Economakos; Dimitrios Soudris (ACM Trans. Embed. Comput. Syst., 2014)

Dynamic Memory Management in Vivado-HLS for Scalable Many-Accelerator Architectures. - Dionysios Diamantopoulos; Sotirios Xydis; Kostas Siozios; Dimitrios Soudris (ARC, 2015)

SPARTAN/SEXTANT/COMPASS: Advancing Space Rover Vision via Reconfigurable Platforms. - George Lentaris; Ioannis Stamoulias; Dionysios Diamantopoulos; Konstantinos Maragos 001; Kostas Siozios; Dimitrios Soudris; Marcos Avilés Rodrigálvarez; Manolis I. A. Lourakis; Xenophon Zabulis; Ioannis Kostavelis; Lazaros Nalpantidis; Evangelos Boukas; et al. (ARC, 2015)

TEAChER: TEach AdvanCEd Reconfigurable Architectures and Tools. - Kostas Siozios; Peter Figuli; Harry Sidiropoulos; Carsten Tradowsky; Dionysios Diamantopoulos; Konstantinos Maragos 001; Shalina Percy Delicia; Dimitrios Soudris; Jürgen Becker 001 (ARC, 2015)

Evaluation of High-Level Synthesis Techniques for Memory and Datapath Tradeoffs in FPGA Based SoC Architectures. - Efstathios Sotiriou-Xanthopoulos; Dionysios Diamantopoulos; George Economakos (ARC, 2015)

High-Level-Synthesis extensions for scalable Single-Chip Many-Accelerators on FPGAs. - Dionysios Diamantopoulos; Sotirios Xydis; Kostas Siozios; Dimitrios Soudris (FPL, 2015)

High-level synthesizable dataflow MapReduce accelerator for FPGA-coupled data centers. - Dionysios Diamantopoulos; Christoforos Kachris (SAMOS, 2015)

Mitigating Memory-Induced Dark Silicon in Many-Accelerator Architectures. - Dionysios Diamantopoulos; Sotirios Xydis; Kostas Siozios; Dimitrios Soudris (IEEE Comput. Archit. Lett., 2015)

GENESIS: Parallel Application Placement onto Reconfigurable Architectures (Invited for the Special Issue on Runtime Management). - Dionysios Diamantopoulos; Kostas Siozios; Sotirios Xydis; Dimitrios Soudris (ACM Trans. Embed. Comput. Syst., 2015)

On supporting rapid prototyping of embedded systems with reconfigurable architectures. - Ioannis Koutras; Konstantinos Maragos 001; Dionysios Diamantopoulos; Kostas Siozios; Dimitrios Soudris (Integr., 2017)

An FPGA-based Integrated MapReduce Accelerator Platform. - Christoforos Kachris; Dionysios Diamantopoulos; Georgios Ch. Sirakoulis; Dimitrios Soudris (J. Signal Process. Syst., 2017)

ecTALK: Energy efficient coherent transprecision accelerators - The bidirectional long short-term memory neural network case. - Dionysios Diamantopoulos; Heiner Giefers; Christoph Hagleitner (COOL CHIPS, 2018)

A System-Level Transprecision FPGA Accelerator for BLSTM Using On-chip Memory Reshaping. - Dionysios Diamantopoulos; Christoph Hagleitner (FPT, 2018)

Extending the POWER Architecture with Transprecision Co-Processors. - Heiner Giefers; Dionysios Diamantopoulos (ISCAS, 2018)

HelmGemm: Managing GPUs and FPGAs for Transprecision GEMM Workloads in Containerized Environments. - Dionysios Diamantopoulos; Christoph Hagleitner (ASAP, 2019)

Coherently Attached Programmable Near-Memory Acceleration Platform and its application to Stencil Processing. - Jan van Lunteren; Ronald P. Luijten; Dionysios Diamantopoulos; Florian Auernhammer; Christoph Hagleitner; Lorenzo Chelini; Stefano Corda; Gagandeep Singh 002 (DATE, 2019)

NARMADA: Near-Memory Horizontal Diffusion Accelerator for Scalable Stencil Computations. - Gagandeep Singh 002; Dionysios Diamantopoulos; Christoph Hagleitner; Sander Stuijk; Henk Corporaal (FPL, 2019)

Low Precision Processing for High Order Stencil Computations. - Gagandeep Singh 002; Dionysios Diamantopoulos; Sander Stuijk; Christoph Hagleitner; Henk Corporaal (SAMOS, 2019)

XwattPilot: A Full-stack Cloud System Enabling Agile Development of Transprecision Software for Low-power SoCs. - Dionysios Diamantopoulos; Florian Scheidegger; Stefan Mach; Fabian Schuiki; Germain Haugou; Michael Schaffner; Frank K. Gürkaynak; Christoph Hagleitner; A. Cristiano I. Malossi; Luca Benini (COOL CHIPS, 2020)

Agile Autotuning of a Transprecision Tensor Accelerator Overlay for TVM Compiler Stack. - Dionysios Diamantopoulos; Burkhard Ringlein; Mitra Purandare; Gagandeep Singh 002; Christoph Hagleitner (FPL, 2020)

A Hardware/Software Co-Design of K-mer Counting Using a CAPI-Enabled FPGA. - Abbas Haghi; Lluc Alvarez; Jordà Polo; Dionysios Diamantopoulos; Christoph Hagleitner; Miquel Moretó (FPL, 2020)

High Bandwidth Memory on FPGAs: A Data Analytics Perspective. - Kaan Kara; Christoph Hagleitner; Dionysios Diamantopoulos; Dimitris Syrivelis; Gustavo Alonso (FPL, 2020)

NERO: A Near High-Bandwidth Memory Stencil Accelerator for Weather Prediction Modeling. - Gagandeep Singh 002; Dionysios Diamantopoulos; Christoph Hagleitner; Juan Gómez-Luna; Sander Stuijk; Onur Mutlu; Henk Corporaal (FPL, 2020)

PHRYCTORIA: A Messaging System for Transprecision OpenCAPI-attached FPGA Accelerators. - Dionysios Diamantopoulos; Mitra Purandare; Burkhard Ringlein; Christoph Hagleitner (IPDPS Workshops, 2020)

Acceleration-as-a-µService: A Cloud-native Monte-Carlo Option Pricing Engine on CPUs, GPUs and Disaggregated FPGAs. - Dionysios Diamantopoulos; Raphael Polig; Burkhard Ringlein; Mitra Purandare; Beat Weiss; Christoph Hagleitner; Mark A. Lantz; François Abel (CLOUD, 2021)

A Case for Function-as-a-Service with Disaggregated FPGAs. - Burkhard Ringlein; François Abel; Dionysios Diamantopoulos; Beat Weiss; Christoph Hagleitner; Marc Reichenbach; Dietmar Fey (CLOUD, 2021)

Heterogeneous Computing Systems for Complex Scientific Discovery Workflows. - Christoph Hagleitner; Dionysios Diamantopoulos; Burkhard Ringlein; Constantinos Evangelinos; Charles R. Johns; Rong N. Chang; Bruce D'Amora; James A. Kahle; James C. Sexton; Michael Johnston; Edward Pyzer-Knapp; Chris Ward (DATE, 2021)

EVEREST: A design environment for extreme-scale big data analytics on heterogeneous platforms. - Christian Pilato; Stanislav Böhm; Fabien Brocheton; Jerónimo Castrillón; Riccardo Cevasco; Vojtech Cima; Radim Cmar; Dionysios Diamantopoulos; Fabrizio Ferrandi; Jan Martinovic; Gianluca Palermo; Michele Paolino; et al. (DATE, 2021)

Modeling FPGA-Based Systems via Few-Shot Learning. - Gagandeep Singh 002; Dionysios Diamantopoulos; Juan Gómez-Luna; Sander Stuijk; Onur Mutlu; Henk Corporaal (FPGA, 2021)

An FPGA Accelerator of the Wavefront Algorithm for Genomics Pairwise Alignment. - Abbas Haghi; Santiago Marco-Sola; Lluc Alvarez; Dionysios Diamantopoulos; Christoph Hagleitner; Miquel Moretó (FPL, 2021)

NERO: Accelerating Weather Prediction using Near-Memory Reconfigurable Fabric. - Gagandeep Singh 002; Dionysios Diamantopoulos; Juan Gómez-Luna; Christoph Hagleitner; Sander Stuijk; Henk Corporaal; Onur Mutlu (CoRR, 2021)

FPGA-Based Near-Memory Acceleration of Modern Data-Intensive Applications. - Gagandeep Singh 002; Mohammed Alser; Damla Senol Cali; Dionysios Diamantopoulos; Juan Gómez-Luna; Henk Corporaal; Onur Mutlu (IEEE Micro, 2021)

Dynamic Heap Management in High-Level Synthesis for Many-Accelerator Architectures. - Argyris Kokkinis; Dionysios Diamantopoulos; Kostas Siozios (FPL, 2022)

LEAPER: Fast and Accurate FPGA-based System Performance Prediction via Transfer Learning. - Gagandeep Singh 002; Dionysios Diamantopoulos; Juan Gómez-Luna; Sander Stuijk; Henk Corporaal; Onur Mutlu (ICCD, 2022)

Dynamic Optimization of On-Chip Memories for HLS Targeting Many-Accelerator Platforms. - Argyris Kokkinis; Dionysios Diamantopoulos; Kostas Siozios (IEEE Comput. Archit. Lett., 2022)

LEAPER: Modeling Cloud FPGA-based Systems via Transfer Learning. - Gagandeep Singh 002; Dionysios Diamantopoulos; Juan Gómez-Luna; Sander Stuijk; Henk Corporaal; Onur Mutlu (CoRR, 2022)

Exploiting HBM on FPGAs for Data Processing. - Runbin Shi; Kaan Kara; Christoph Hagleitner; Dionysios Diamantopoulos; Dimitris Syrivelis; Gustavo Alonso (ACM Trans. Reconfigurable Technol. Syst., 2022)

Accelerating Weather Prediction Using Near-Memory Reconfigurable Fabric. - Gagandeep Singh 002; Dionysios Diamantopoulos; Juan Gómez-Luna; Christoph Hagleitner; Sander Stuijk; Henk Corporaal; Onur Mutlu (ACM Trans. Reconfigurable Technol. Syst., 2022)

Composability of Cloud Accelerators in Virtual World Simulations. - Dionysios Diamantopoulos; Burkhard Ringlein; Beat Weiss; Mark A. Lantz; François Abel (CLOUD, 2023)

DOSA: Organic Compilation for Neural Network Inference on Distributed FPGAs. - Burkhard Ringlein; François Abel; Dionysios Diamantopoulos; Beat Weiss; Christoph Hagleitner; Dietmar Fey (EDGE, 2023)

Advancing Compilation of DNNs for FPGAs Using Operation Set Architectures. - Burkhard Ringlein; François Abel; Dionysios Diamantopoulos; Beat Weiss; Christoph Hagleitner; Dietmar Fey (IEEE Comput. Archit. Lett., 2023)

WFA-FPGA: An efficient accelerator of the wavefront algorithm for short and long read genomics alignment. - Abbas Haghi; Santiago Marco-Sola; Lluc Alvarez; Dionysios Diamantopoulos; Christoph Hagleitner; Miquel Moretó (Future Gener. Comput. Syst., 2023)

On the Generalizability of Machine Learning-based Ransomware Detection in Block Storage. - Nicolas Reategui; Roman Pletka; Dionysios Diamantopoulos (CoRR, 2024)