Parallel Image Processing On Enhanced Arrays. - Dionisios I. Reisis; Viktor K. Prasanna (ICPP, 1987)

VLSI Arrays with Reconfigurable Buses. - Dionisios I. Reisis; Viktor K. Prasanna (ICS, 1987)

Image computations on reconfigurable VLSI arrays. - Russ Miller; V. K. Prasanna Kumar; Dionysios I. Reisis; Quentin F. Stout (CVPR, 1988)

Data Movement Operations and Applications on Reconfigurable VLSI Arrays. - Russ Miller; Viktor K. Prasanna; Dionisios I. Reisis; Quentin F. Stout (ICPP (1), 1988)

Image Computations on Meshes with Multiple Broadcast. - Viktor K. Prasanna; Dionisios I. Reisis (IEEE Trans. Pattern Anal. Mach. Intell., 1989)

Improved Graph Computations on the Reconfigurable Mesh. - Dionisios I. Reisis (IPPS, 1991)

An Efficient Convex Hull Computation on the Reconfigurable Mesh. - Dionisios I. Reisis (IPPS, 1992)

Parallel Computations on Reconfigurable Meshes. - Russ Miller; Viktor K. Prasanna; Dionisios I. Reisis; Quentin F. Stout (IEEE Trans. Computers, 1993)

An Efficient Network Analyser Based on Linear Array Architecture. - S. N. Metallinos; Dionisios I. Reisis; George I. Stassinopoulos (Parallel Algorithms Appl., 1994)

An efficient digital FIR filter design for 64 QAM. - A. Chorevas; Dionisios I. Reisis; E. G. Metaxakis (ICECS, 1996)

An array based system for real time buffer management. - George E. Konstantoulakis; Dionysios I. Reisis (ICECS, 1996)

An efficient shared-buffer for high speed ATM networks. - George E. Konstantoulakis; Kostas Pramataris; Dionisios I. Reisis; Georgios I. Stassinopoulos (ICECS, 1996)

Developing an Efficient Model for Evaluating WWW Search Engines. - I. Despotopoulos; G. Korinthios; I. Nasios; Dionysios I. Reisis (Applied Informatics, 1999)

Design and Implementation of a Low-Cost Highly-Modular ATM Access Node Switch. - George Lykakis; Kostas Pramataris; Dionisios I. Reisis; George I. Stassinopoulos; G. Synnefakis; Euripides Zervanos (Applied Informatics, 1999)

An efficient component (IN-RAM) for buffer management and multi-protocol implementation in ATM systems. - Gregory Doumenis; George E. Konstantoulakis; G. Korinthios; George Lykakis; Dionysios I. Reisis; G. Synnefakis (ICECS, 1999)

A Parallel VLSI Video/Communication Controller. - Gregory Doumenis; George E. Konstantoulakis; G. Korinthios; George Lykakis; Dionisios I. Reisis; G. Synnefakis (J. VLSI Signal Process., 2001)

Verification of a Complex SoC: The PRO3 Case-Study. - Fotis Andritsopoulos; C. Charopoulos; Gregory Doumenis; Fotis Karoubalis; Yannis Mitsos; F. Petreas; Ioanna Theologitou; Stylianos Perissakis; Dionisios I. Reisis (DATE, 2003)

Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip. - George Lykakis; N. Mouratidis; Kyriakos Vlachos; Nikos A. Nikolaou; Stylianos Perissakis; G. Sourdis; George E. Konstantoulakis; Dionisios N. Pnevmatikatos; Dionisios I. Reisis (DATE, 2003)

A VLSI architecture for minimizing the transmission power in OFDM transceivers. - Konstantinos Babionitakis; Y. Dagres; Konstantinos Nakos; Dionysios I. Reisis (ICECS, 2003)

Hardware Architectures for the Efficient Implementation of Multi-Service Broadband Access and Multimedia Home Networks. - Theofanis Orphanoudakis; Stylianos Perissakis; Kostas Pramataris; Nikos A. Nikolaou; Nicholas Zervos; Matthias Steck; Christoph Baumhof; Diederik Verkest; Chantal Ykman-Couvreur; Gregory Doumenis; Fotis Karoubalis; Ioanna Theologitou; et al. (Telecommun. Syst., 2003)

Efficient Systolic Array Mapping of FIR Filters Used in PAM-QAM Modulators. - A. Chorevas; Dionysios I. Reisis (J. VLSI Signal Process., 2003)

An Efficient H.264 VLSI Advanced Video Encoder. - Konstantinos Babionitakis; George Lentaris; Konstantinos Nakos; Dionysios I. Reisis; Nikolaos Vlassopoulos; Gregory Doumenis; George Georgakarakos; John Sifnaios (ICECS, 2006)

A High Performance VLSI FFT Architecture. - Konstantinos Babionitakis; Konstantinos Manolopoulos; Konstantinos Nakos; Dionysios I. Reisis; Nikolaos Vlassopoulos; Vassilios A. Chouliaras (ICECS, 2006)

Address Generation Techniques for Conflict Free Parallel Memory Accessing in FFT Architectures. - Dionysios I. Reisis; Nikolaos Vlassopoulos (ICECS, 2006)

An approach for efficient design of digital amplifiers. - Nikolaos Vlassopoulos; Dionysios I. Reisis; George Lentaris; George S. Tombras; Evangelos A. Prosalentis; N. Ritas; Konstantinos S. Tsakalis (ISCAS, 2006)

High Performance 16K, 64K, 256K complex points VLSI Systolic FFT Architectures. - Konstantinos Manolopoulos; Konstantinos Nakos; Dionysios I. Reisis; Nikolaos Vlassopoulos; Vassilios A. Chouliaras (ICECS, 2007)

Addressing technique for parallel memory accessing in radix-2 FFT processors. - Konstantinos Nakos; Dionysios I. Reisis; Nikolaos Vlassopoulos (ICECS, 2008)

Customization of an embedded RISC CPU with SIMD extensions for video encoding: A case study. - Vassilios A. Chouliaras; Vincent M. Dwyer; Shahrukh Agha; José L. Núñez-Yáñez; Dionysios I. Reisis; Konstantinos Nakos; Konstantinos Manolopoulos (Integr., 2008)

A real-time motion estimation FPGA architecture. - Konstantinos Babionitakis; Gregory Doumenis; George Georgakarakos; George Lentaris; Konstantinos Nakos; Dionysios I. Reisis; Ioannis Sifnaios; Nikolaos Vlassopoulos (J. Real Time Image Process., 2008)

A real-time H.264/AVC VLSI encoder architecture. - Konstantinos Babionitakis; Gregory Doumenis; George Georgakarakos; George Lentaris; Konstantinos Nakos; Dionysios I. Reisis; Ioannis Sifnaios; Nikolaos Vlassopoulos (J. Real Time Image Process., 2008)

Conflict-Free Parallel Memory Accessing Techniques for FFT Architectures. - Dionysios I. Reisis; Nikolaos Vlassopoulos (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Efficient cascaded VLSI FFT architecture for OFDM systems. - Vassilios A. Chouliaras; Panagiotis Galiatsatos; Konstantinos Nakos; Dionysios I. Reisis; Nikolaos Vlassopoulos (ICECS, 2009)

Programmable Motion Estimation architecture. - Anargyros Drolapas; George Lentaris; Dionysios I. Reisis (ICECS, 2009)

Evaluating the performance of a configurable, extensible VLIW processor in FFT execution. - David Stevens; Nick Glynn; Panagiotis Galiatsatos; Vassilios A. Chouliaras; Dionysios I. Reisis (ICECS, 2009)

A configurable length, Fused Multiply-Add floating point unit for a VLIW processor. - Vassilios A. Chouliaras; Konstantinos Manolopoulos; Dionysios I. Reisis (SoCC, 2009)

An efficient dual-mode floating-point Multiply-Add Fused Unit. - Konstantinos Manolopoulos; Dionysios I. Reisis; Vassilios A. Chouliaras (ICECS, 2010)

A continuous-flow, Variable-Length FFT SDF architecture. - Nikolaos Polychronakis; Dionysios I. Reisis; Emmanouil Tsilis (ICECS, 2010)

A Graphics Parallel Memory Organization Exploiting Request Correlations. - George Lentaris; Dionysios I. Reisis (IEEE Trans. Computers, 2010)

Fully Systolic FFT Architecture for Giga-sample Applications. - Konstantinos Babionitakis; Vassilios A. Chouliaras; Konstantinos Manolopoulos; Konstantinos Nakos; Dionysios I. Reisis; Nikolaos Vlassopoulos (J. Signal Process. Syst., 2010)

Customizing a VLIW Chip Multiprocessor for Motion Estimation Algorithms. - Vassilios A. Chouliaras; George Lentaris; Dionisios I. Reisis; David Stevens (ARCS Workshops, 2011)

Configurable baseband digital transceiver for Gbps wireless 60 GHz communications. - Dionysios Diamantopoulos; Panagiotis Galiatsatos; Athanasios Karachalios; George Lentaris; Dionisios I. Reisis; Dimitrios Soudris (ICECS, 2011)

Study of interpolation filters for motion estimation with application in H.264/AVC encoders. - Georgios Georgis; George Lentaris; Dionysios I. Reisis (ICECS, 2011)

An efficient multiple precision floating-point multiplier. - Konstantinos Manolopoulos; Dionisios I. Reisis; Vassilios A. Chouliaras (ICECS, 2011)

A Control-Theoretic Approach for Efficient Design of Filters in DAC and Digital Audio Amplifiers. - Konstantinos S. Tsakalis; Nikolaos Vlassopoulos; George Lentaris; Dionysios I. Reisis (Circuits Syst. Signal Process., 2011)

Signal processing for deep-sea observatories with reconfigurable hardware. - Konstantinos Manolopoulos; A. Belias; Georgios Georgis; Dionysios I. Reisis; E. G. Anasontzis (ICECS, 2012)

Conflict free, parallel memory access for radix-2 FFT processors. - Nikolaos Polychronakis; Dionysios I. Reisis; Emmanouil Tsilis; Ioannis Zokas (ICECS, 2012)

Design and Comparison of FFT VLSI Architectures for SoC Telecom Applications with Different Flexibility, Speed and Complexity Trade-Offs. - Sergio Saponara; Massimo Rovini; Luca Fanucci; Athanasios Karachalios; George Lentaris; Dionysios I. Reisis (Circuits Syst. Signal Process., 2012)

Single-image super-resolution using low complexity adaptive iterative back-projection. - Georgios Georgis; George Lentaris; Dionysios I. Reisis (DSP, 2013)

PANDA: asymmetric passive optical network for xDSL and FTTH access. - Konstantinos Yiannopoulos; Emmanouel A. Varvarigos; Dimitrios Klonidis; Ioannis Tomkos; Maria Spyropoulou; Ioannis Lazarou; Paraskevas Bakopoulos; Hercules Avramopoulos; George Heliotis; L.-P. Dimos; George Agapiou; Georgios Papastergiou; et al. (Panhellenic Conference on Informatics, 2013)

Using high-level synthesis to build memory and datapath optimized DSP accelerators. - Dionysios Diamantopoulos; George Economakos; Dionysios I. Reisis (ICECS, 2014)

XG-PON optical network unit downstream FEC design based on truncated Reed-Solomon code. - Georgios Georgis; Charalambos Tzeranis; Dionysios I. Reisis; George Synnefakis (ICECS, 2014)

A MapReduce framework implementation for Network-on-Chip platforms. - Konstantinos Gyftakis; Iraklis Anagnostopoulos; Dimitrios Soudris; Dionysios I. Reisis (ICECS, 2014)

Neuronal connectivity assessment for epileptic seizure prevention: Parallelizing the generalized partial directed coherence on many-core platforms. - Georgios Georgis; Dionysios I. Reisis; Panagiotis Skordilakis; Konstantinos S. Tsakalis; Ashfaque Bin Shafique; George Chatzikonstantis; George Lentaris (ICSAMOS, 2014)

Towards real-time neuronal connectivity assessment: A scalable pipelined parallel generalized partial directed coherence engine. - Georgios Georgis; Georgios Menoutis; Dionysios I. Reisis; Konstantinos S. Tsakalis; Ashfaque Bin Shafique (ICECS, 2015)

A configurable transmitter architecture & organization for XG-PON OLT/ONU/ONT network elements. - Georgios Menoutis; Andreas Foteas; Nikolaos Liakopoulos; Georgios Georgis; Dionysios I. Reisis; George Synnefakis (ICECS, 2015)

Exact Max-Log MAP Soft-Output Sphere Decoding via Approximate Schnorr-Euchner Enumeration. - Konstantinos Nikitopoulos; Athanasios Karachalios; Dionysios I. Reisis (IEEE Trans. Veh. Technol., 2015)

A scalable optically-switched datacenter network with multicasting. - Konstantinos Tokas; Christos Spatharakis; Ioannis Kanakis; Nikolaos Iliadis; Paraskevas Bakopoulos; Hercules Avramopoulos; Ioannis Patronas; Nikolaos Liakopoulos; Dionysios I. Reisis (EuCNC, 2016)

Agora: Agent and market-based resource management for many-core systems. - Themistoklis Melissaris; Iraklis Anagnostopoulos; Dimitrios Soudris; Dionysios I. Reisis (ICECS, 2016)

Switching functions of a data center Top-of-Rack (ToR). - Ioannis Patronas; Angelos Kyriakos; Dionysios I. Reisis (ICECS, 2016)

A Co-Design Approach For Rapid Prototyping Of Image Processing On SoC FPGAs. - Ioannis Stratakos; Dionysios I. Reisis; George Lentaris; Konstantinos Maragos 001; Dimitrios Soudris (PCI, 2016)

An efficient multiple precision floating-point Multiply-Add Fused unit. - Konstantinos Manolopoulos; Dionisios I. Reisis; Vassilios A. Chouliaras (Microelectron. J., 2016)

Reduced Complexity Superresolution for Low-Bitrate Video Compression. - Georgios Georgis; George Lentaris; Dionysios I. Reisis (IEEE Trans. Circuits Syst. Video Technol., 2016)

Slotted TDMA and optically switched network for disaggregated datacenters. - Konstantinos Tokas; Ioannis Patronas; Christos Spatharakis; Dionysios I. Reisis; Paraskevas Bakopoulos; Hercules Avramopoulos (ICTON, 2017)

SDN control framework with dynamic resource assignment for slotted optical datacenter networks. - Giada Landi; Ioannis Patronas; Kostas Kontodimas; Muzzamil Aziz; Kostas Christodoulopoulos; Angelos Kyriakos; Marco Capitani; Amirreza Fazely Hamedani; Dionysios I. Reisis; Emmanouel A. Varvarigos; Paraskevas Bakopoulos; Hercules Avramopoulos (OFC, 2017)

Real Time Demonstration of an End-to-End Optical Datacenter Network with Dynamic Bandwidth Allocation. - Konstantinos Tokas; Christos Spatharakis; Ioannis Patronas; Paraskevas Bakopoulos; Giada Landi; Konstantinos Christodoulopoulos; Marco Capitani; Angelos Kyriakos; Muzzamil Aziz; Richard Pitwon; Domenico Gallico; Dionisios I. Reisis; et al. (ECOC, 2018)

Parallel Robust Absolute Orientation on FPGA for Vision and Robotics. - Nikolaos Dimou; Manolis I. A. Lourakis; George Lentaris; Dimitrios Soudris; Dionysios I. Reisis (ICECS, 2018)

Parity Based In-Place FFT Architecture for Continuous Flow Applications. - Vasileios Kitsakis; Elissaios-Alexios Papatheofanous; Dionisios I. Reisis; George Lentaris; Dimitrios Soudris (ICECS, 2018)

NEPHELE: Vertical Integration and Real-Time Demonstration of an Optical Datacenter Network. - Christos Spatharakis; Konstantinos Tokas; Ioannis Patronas; Paraskevas Bakopoulos; Dionysios I. Reisis; Hercules Avramopoulos (ICTON, 2018)

Scheduler Accelerator for TDMA Data Centers. - Ioannis Patronas; Nikolaos Gkatzios; Vasileios Kitsakis; Dionysios I. Reisis; Konstantinos Christodoulopoulos; Emmanouel A. Varvarigos (PDP, 2018)

NEPHELE: An End-to-End Scalable and Dynamically Reconfigurable Optical Architecture for Application-Aware SDN Cloud Data Centers. - Paraskevas Bakopoulos; Konstantinos Christodoulopoulos; Giada Landi; Muzzamil Aziz; Eitan Zahavi; Domenico Gallico; Richard Pitwon; Konstantinos Tokas; Ioannis Patronas; Marco Capitani; Christos Spatharakis; Konstantinos Yiannopoulos; et al. (IEEE Commun. Mag., 2018)

Parallel Memory Accessing for FFT Architectures. - Vasileios Kitsakis; Konstantinos Nakos; Dionysios I. Reisis; Nikolaos Vlassopoulos (J. Signal Process. Syst., 2018)

Design of a Real-Time DSP Engine on RF-SoC FPGA for 5G Networks. - Vasileios Kitsakis; Konstantina Kanta; Ioannis Stratakos; Giannis Giannoulis; Dimitrios Apostolopoulos; George Lentaris; Hercules Avramopoulos; Dimitrios Soudris; Dionysios I. Reisis (ONDM, 2019)

High Performance Accelerator for CNN Applications. - Angelos Kyriakos; Vasileios Kitsakis; Alexandros Louropoulos; Elissaios-Alexios Papatheofanous; Ioannis Patronas; Dionysios I. Reisis (PATMOS, 2019)

Acceleration techniques and evaluation on multi-core CPU, GPU and FPGA for image processing and super-resolution. - Georgios Georgis; George Lentaris; Dionysios I. Reisis (J. Real Time Image Process., 2019)

Demonstration of FPGA-based A-IFoF/mmWave transceiver integration in mobile infrastructure for beyond 5G transport. - Panagiotis Toumasis; Konstantina Kanta; Kostas Tokas; Ioannis Stratakos; Elissaios-Alexios Papatheofanous; Giannis Giannoulis; Ioanna Mesogiti; Eleni Theodoropoulou; George L. Lyberopoulos; George Lentaris; Dimitrios Apostolopoulos; Dionysios I. Reisis; et al. (ECOC, 2021)

FPGA & VPU Co-Processing in Space Applications: Development and Testing with DSP/AI Benchmarks. - Vasileios Leon; Charalampos Bezaitis; George Lentaris; Dimitrios Soudris; Dionysios I. Reisis; Elissaios-Alexios Papatheofanous; Angelos Kyriakos; Aubrey Dunne; Arne Samuelsson; David Steenari (ICECS, 2021)

The LDPC Challenge in Software-Based 5G New Radio Physical Layer Processing. - Elissaios-Alexios Papatheofanous; Dionysios I. Reisis; Konstantinos Nikitopoulos (MeditCom, 2021)

Towards sharing one FPGA SoC for both low-level PHY and high-level AI/ML computing at the edge. - Ioannis Stratakos; Elissaios-Alexios Papatheofanous; Dimitrios Danopoulos; George Lentaris; Dionysios I. Reisis; Dimitrios Soudris (MeditCom, 2021)

LDPC Hardware Acceleration in 5G Open Radio Access Network Platforms. - Elissaios-Alexios Papatheofanous; Dionysios I. Reisis; Konstantinos Nikitopoulos (IEEE Access, 2021)

End-to-End Real-Time Service Provisioning over a SDN-controllable 60 GHz analog FiWi X-haul for 5G Hot-Spot Networks. - Christos Vagionas; Ronis T. Maximidis; Ioannis Stratakos; Aristotelis Margaris; Agapi Mesodiakaki; Marios Gatzianas; Konstantina Kanta; Panagiotis Toumasis; Giannis Giannoulis; Dimitrios Apostolopoulos; Elissaios-Alexios Papatheofanous; George Lentaris; et al. (OFC, 2022)

Combining Fault Tolerance Techniques and COTS SoC Accelerators for Payload Processing in Space. - Vasileios Leon; Elissaios-Alexios Papatheofanous; George Lentaris; Charalampos Bezaitis; Nikolaos Mastorakis; Georgios Bampilis; Dionysios I. Reisis; Dimitrios Soudris (VLSI-SoC, 2022)

SoC FPGA Acceleration for Semantic Segmentation of Clouds in Satellite Images. - Elissaios-Alexios Papatheofanous; Ph. Tziolos; V. Kalekis; Tzouma Amrou; George E. Konstantoulakis; Georgios Venitourakis; Dionysios I. Reisis (VLSI-SoC, 2022)

Resources and Power Efficient FPGA Accelerators for Real-Time Image Classification. - Angelos Kyriakos; Elissaios-Alexios Papatheofanous; Charalampos Bezaitis; Dionysios I. Reisis (J. Imaging, 2022)

Live demonstration of an SDN-reconfigurable, FPGA-based TxRx for an analog-IFoF/mmWave radio access network in an MNO's infrastructure. - Konstantina Kanta; Panagiotis Toumasis; Giannis Giannoulis; Ioannis Stratakos; George Lentaris; Elissaios-Alexios Papatheofanous; Ioanna Mesogiti; Eleni Theodoropoulou; Aristotelis Margaris; Dimitris Syrivelis; Evrydiki Kyriazi; Giorgos Brestas; et al. (JOCN, 2022)

Neural Network-Based Solar Irradiance Forecast for Edge Computing Devices. - Georgios Venitourakis; Christoforos Vasilakis; Alexandros Tsagkaropoulos; Tzouma Amrou; George E. Konstantoulakis; Panagiotis Golemis; Dionysios I. Reisis (Inf., 2023)

Nanosatellite Flight Software: A Rigorous Software Architecture Perspective. - Christoforos Vasilakis; Alexandros Tsagkaropoulos; Angelos Motsios; Christos Tsigkanos; Dionysios I. Reisis (ECSA, 2025)

Autonomously Reconfigurable Telemetry and Monitoring System for CubeSats. - Christoforos Vasilakis; Alexandros Tsagkaropoulos; Angelos Motsios; Dionysios I. Reisis (ISVLSI, 2025)