A static pattern-independent technique for power grid voltage integrity verification. - Dionysios Kouroussis; Farid N. Najm (DAC, 2003)

Worst-case circuit delay taking into account power supply variations. - Dionysios Kouroussis; Rubil Ahmadi; Farid N. Najm (DAC, 2004)

Incremental partitioning-based vectorless power grid verification. - Dionysios Kouroussis; Imad A. Ferzli; Farid N. Najm (ICCAD, 2005)

Voltage-Aware Static Timing Analysis. - Dionysios Kouroussis; Rubil Ahmadi; Farid N. Najm (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)