Power-Delay Metrics Revisited for 90nm CMOS Technology. - Dipanjan Sengupta; Resve A. Saleh (ISQED, 2005)

Generalized Power-Delay Metrics in Deep Submicron CMOS Designs. - Dipanjan Sengupta; Resve A. Saleh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Application-driven floorplan-aware voltage island design. - Dipanjan Sengupta; Resve A. Saleh (DAC, 2008)

Supply voltage selection in Voltage Island based SoC design. - Dipanjan Sengupta; Resve A. Saleh (SoCC, 2008)

Application-Driven Voltage-Island Partitioning for Low-Power System-on-Chip Design. - Dipanjan Sengupta; Resve A. Saleh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Sequence pair based voltage island floorplanning. - Dipanjan Sengupta; Andreas G. Veneris; Steven J. E. Wilton; André Ivanov; Res Saleh (IGCC, 2011)

Lazy suspect-set computation: fault diagnosis for deep electrical bugs. - Dipanjan Sengupta; Flavio M. de Paula; Alan J. Hu; Andreas G. Veneris; André Ivanov (ACM Great Lakes Symposium on VLSI, 2012)

Multi-objective voltage island floorplanning using sequence pair representation. - Dipanjan Sengupta; Andreas G. Veneris; Steven J. E. Wilton; André Ivanov (Sustain. Comput. Informatics Syst., 2012)

Reviving erroneous stability-based clock-gating using partial Max-SAT. - Bao Le; Dipanjan Sengupta; Andreas G. Veneris (ASP-DAC, 2013)

Multi-tenancy on GPGPU-based servers. - Dipanjan Sengupta; Raghavendra Belapure; Karsten Schwan (VTDC@HPDC, 2013)

Accelerating post silicon debug of deep electrical faults. - Bao Le; Dipanjan Sengupta; Andreas G. Veneris; Zissis Poulos (IOLTS, 2013)

Early detection of current hot spots in power gated designs. - Dipanjan Sengupta; Erhan Ergin; Andreas G. Veneris (ISLPED, 2013)

Scheduling Multi-tenant Cloud Workloads on Accelerator-Based Systems. - Dipanjan Sengupta; Anshuman Goswami; Karsten Schwan; Krishna Pallavi (SC, 2014)

GraphReduce: Large-Scale Graph Analytics on Accelerator-Based HPC Systems. - Dipanjan Sengupta; Kapil Agarwal; Shuaiwen Leon Song; Karsten Schwan (IPDPS Workshops, 2015)

Constructing stability-based clock gating with hierarchical clustering. - Bao Le; Djordje Maksimovic; Dipanjan Sengupta; Erhan Ergin; Ryan Berryhill; Andreas G. Veneris (PATMOS, 2015)

GraphReduce: processing large-scale graphs on accelerator-based systems. - Dipanjan Sengupta; Shuaiwen Leon Song; Kapil Agarwal; Karsten Schwan (SC, 2015)

A Framework for Emulating Non-Volatile Memory Systemswith Different Performance Characteristics. - Dipanjan Sengupta; Qi Wang; Haris Volos 001; Ludmila Cherkasova; Jun Li 008; Guilherme Magalhaes; Karsten Schwan (ICPE, 2015)

GraphIn: An Online High Performance Incremental Graph Processing Framework. - Dipanjan Sengupta; Narayanan Sundaram; Xia Zhu; Theodore L. Willke; Jeffrey S. Young 001; Matthew Wolf; Karsten Schwan (Euro-Par, 2016)

System design principles for heterogeneous resource management and scheduling in accelerator-based systems. - Dipanjan Sengupta (2016)

EvoGraph: On-the-Fly Efficient Mining of Evolving Graphs on GPU. - Dipanjan Sengupta; Shuaiwen Leon Song (ISC, 2017)

High-Performance Incremental SVM Learning on Intel® Xeon Phi™ Processors. - Dipanjan Sengupta; Yida Wang 003; Narayanan Sundaram; Theodore L. Willke (ISC, 2017)

Similarity Learning with Higher-Order Proximity for Brain Network Analysis. - Guixiang Ma; Nesreen K. Ahmed; Theodore L. Willke; Dipanjan Sengupta; Michael W. Cole; Nicholas B. Turk-Browne; Philip S. Yu (CoRR, 2018)

NUMA-Caffe: NUMA-Aware Deep Learning Neural Networks. - Probir Roy; Shuaiwen Leon Song; Sriram Krishnamoorthy; Abhinav Vishnu; Dipanjan Sengupta; Xu Liu 001 (ACM Trans. Archit. Code Optim., 2018)

Deep Graph Similarity Learning for Brain Data Analysis. - Guixiang Ma; Nesreen K. Ahmed; Theodore L. Willke; Dipanjan Sengupta; Michael W. Cole; Nicholas B. Turk-Browne; Philip S. Yu (CIKM, 2019)

Procrustean Orthogonal Sparse Hashing. - Mariano Tepper; Dipanjan Sengupta; Theodore L. Willke (CoRR, 2020)