Dictionary Based Code Compression for Variable Length Instruction Encodings. - Dipankar Das 002; Rajeev Kumar 004; P. P. Chakrabarti 001 (VLSI Design, 2005)

Timing Verification of UML Activity Diagram Based Code Block Level Models for Real Time Multiprocessor System-on-Chip Applications. - Dipankar Das 002; Rajeev Kumar 004; P. P. Chakrabarti 001 (APSEC, 2006)

SystemC Modeling and Validation of A RISC Processor System. - Rajeev Kumar 004; Rahul Chaudhry; Dipankar Das 002; Vibha Rathi; Subrat Kumar Panda; P. P. Chakrabarti 001 (FDL, 2006)

Functional verification of task partitioning for multiprocessor embedded systems. - Dipankar Das 002; P. P. Chakrabarti 001; Rajeev Kumar 004 (ACM Trans. Design Autom. Electr. Syst., 2007)

Code compression for performance enhancement of variable-length embedded processors. - Rajeev Kumar 004; Dipankar Das 002 (ACM Trans. Embed. Comput. Syst., 2008)

Scenario-based timing verification of multiprocessor embedded applications. - Dipankar Das 002; P. P. Chakrabarti 001; Rajeev Kumar 004 (ACM Trans. Design Autom. Electr. Syst., 2009)

Thermal analysis of multiprocessor SoC applications by simulation and verification. - Dipankar Das 002; P. P. Chakrabarti 001; Rajeev Kumar 004 (ACM Trans. Design Autom. Electr. Syst., 2010)

A framework for early stage quality-fault tolerance analysis of embedded control systems. - Satya Gautam Vadlamudi; P. P. Chakrabarti 001; Dipankar Das 002; Purnendu Sinha (DSN, 2011)

Robust embedded software design through early analysis of quality faults. - Dipankar Das 002; P. P. Chakrabarti 001; Purnendu Sinha (ISEC, 2011)

Finding Critical Components in Embedded Control Systems Sensitive to Quality-Faults. - Vishal Shrivastav; Satya Gautam Vadlamudi; P. P. Chakrabarti 001; Dipankar Das 002; Purnendu Sinha (ISED, 2012)

Prediction Schemes for Compensating Variable Delay for Improving Performance of Real-Time Control Tasks. - Saptarshi Roy; Amit Patra; Partha Pratim Chakrabarti; Purnendu Sinha; Dipankar Das 002 (VLSI Design, 2013)

Improving concurrency and asynchrony in multithreaded MPI applications using software offloading. - Karthikeyan Vaidyanathan; Dhiraj D. Kalamkar; Kiran Pamnany; Jeff R. Hammond; Pavan Balaji; Dipankar Das 002; Jongsoo Park; Bálint Joó (SC, 2015)

Parallel Efficient Sparse Matrix-Matrix Multiplication on Multicore Platforms. - Md. Mostofa Ali Patwary; Nadathur Rajagopalan Satish; Narayanan Sundaram; Jongsoo Park; Michael J. Anderson; Satya Gautam Vadlamudi; Dipankar Das 002; Sergey G. Pudov; Vadim O. Pirogov; Pradeep Dubey (ISC, 2015)

GraphMat: High performance graph analytics made productive. - Narayanan Sundaram; Nadathur Rajagopalan Satish; Md. Mostofa Ali Patwary; Subramanya Dulloor; Satya Gautam Vadlamudi; Dipankar Das 002; Pradeep Dubey (CoRR, 2015)

GraphMat: High performance graph analytics made productive. - Narayanan Sundaram; Nadathur Satish; Md. Mostofa Ali Patwary; Subramanya Dulloor; Michael J. Anderson; Satya Gautam Vadlamudi; Dipankar Das 002; Pradeep Dubey (Proc. VLDB Endow., 2015)

Distributed Deep Learning Using Synchronous Stochastic Gradient Descent. - Dipankar Das 002; Sasikanth Avancha; Dheevatsa Mudigere; Karthikeyan Vaidyanathan; Srinivas Sridharan 002; Dhiraj D. Kalamkar; Bharat Kaul; Pradeep Dubey (CoRR, 2016)

ScaleDeep: A Scalable Compute Architecture for Learning and Evaluating Deep Networks. - Swagath Venkataramani; Ashish Ranjan 001; Subarno Banerjee; Dipankar Das 002; Sasikanth Avancha; Ashok Jagannathan; Ajaya Durg; Dheemanth Nagaraj; Bharat Kaul; Pradeep Dubey; Anand Raghunathan (ISCA, 2017)

Ternary Residual Networks. - Abhisek Kundu; Kunal Banerjee 001; Naveen Mellempudi; Dheevatsa Mudigere; Dipankar Das 002; Bharat Kaul; Pradeep Dubey (CoRR, 2017)

Mixed Low-precision Deep Learning Inference using Dynamic Fixed Point. - Naveen Mellempudi; Abhisek Kundu; Dipankar Das 002; Dheevatsa Mudigere; Bharat Kaul (CoRR, 2017)

Ternary Neural Networks with Fine-Grained Quantization. - Naveen Mellempudi; Abhisek Kundu; Dheevatsa Mudigere; Dipankar Das 002; Bharat Kaul; Pradeep Dubey (CoRR, 2017)

RAIL: Risk-Averse Imitation Learning. - Anirban Santara; Abhishek Naik; Balaraman Ravindran; Dipankar Das 002; Dheevatsa Mudigere; Sasikanth Avancha; Bharat Kaul (AAMAS, 2018)

Out-of-Distribution Detection Using an Ensemble of Self Supervised Leave-Out Classifiers. - Apoorv Vyas; Nataraj Jammalamadaka; Xia Zhu; Dipankar Das 002; Bharat Kaul; Theodore L. Willke (ECCV (8), 2018)

Mixed Precision Training of Convolutional Neural Networks using Integer Operations. - Dipankar Das 002; Naveen Mellempudi; Dheevatsa Mudigere; Dhiraj D. Kalamkar; Sasikanth Avancha; Kunal Banerjee 001; Srinivas Sridharan 002; Karthik Vaidyanathan; Bharat Kaul; Evangelos Georganas; Alexander Heinecke; Pradeep Dubey; et al. (ICLR (Poster), 2018)

On Scale-out Deep Learning Training for Cloud and HPC. - Srinivas Sridharan 002; Karthikeyan Vaidyanathan; Dhiraj D. Kalamkar; Dipankar Das 002; Mikhail E. Smorkalov; Mikhail Shiryaev; Dheevatsa Mudigere; Naveen Mellempudi; Sasikanth Avancha; Bharat Kaul; Pradeep Dubey (CoRR, 2018)

X-MANN: A Crossbar based Architecture for Memory Augmented Neural Networks. - Ashish Ranjan 001; Shubham Jain; Jacob R. Stevens; Dipankar Das 002; Bharat Kaul; Anand Raghunathan (DAC, 2019)

Manna: An Accelerator for Memory-Augmented Neural Networks. - Jacob R. Stevens; Ashish Ranjan 001; Dipankar Das 002; Bharat Kaul; Anand Raghunathan (MICRO, 2019)

A Study of BFLOAT16 for Deep Learning Training. - Dhiraj D. Kalamkar; Dheevatsa Mudigere; Naveen Mellempudi; Dipankar Das 002; Kunal Banerjee 001; Sasikanth Avancha; Dharma Teja Vooturi; Nataraj Jammalamadaka; Jianyu Huang; Hector Yuen; Jiyan Yang; Jongsoo Park; et al. (CoRR, 2019)

Mixed Precision Training With 8-bit Floating Point. - Naveen Mellempudi; Sudarshan Srinivasan; Dipankar Das 002; Bharat Kaul (CoRR, 2019)

High Performance Scalable FPGA Accelerator for Deep Neural Networks. - Sudarshan Srinivasan; Pradeep Janedula; Saurabh Dhoble; Sasikanth Avancha; Dipankar Das 002; Naveen Mellempudi; Bharat Daga; Martin Langhammer; Gregg Baeckler; Bharat Kaul (CoRR, 2019)

K-TanH: Hardware Efficient Activations For Deep Learning. - Abhisek Kundu; Sudarshan Srinivasan; Eric C. Qin; Dhiraj D. Kalamkar; Naveen K. Mellempudi; Dipankar Das 002; Kunal Banerjee 001; Bharat Kaul; Pradeep Dubey (CoRR, 2019)

SIGMA: A Sparse and Irregular GEMM Accelerator with Flexible Interconnects for DNN Training. - Eric Qin 001; Ananda Samajdar; Hyoukjun Kwon; Vineet Nadella; Sudarshan Srinivasan; Dipankar Das 002; Bharat Kaul; Tushar Krishna (HPCA, 2020)

Reliability Evaluation of Compressed Deep Learning Models. - Brunno F. Goldstein; Sudarshan Srinivasan; Dipankar Das 002; Kunal Banerjee 001; Leandro Santiago de Araújo; Victor da Cruz Ferreira; Alexandre Solon Nery; Sandip Kundu; Felipe M. G. França (LASCAS, 2020)

GNNerator: A Hardware/Software Framework for Accelerating Graph Neural Networks. - Jacob R. Stevens; Dipankar Das 002; Sasikanth Avancha; Bharat Kaul; Anand Raghunathan (DAC, 2021)

Extending Sparse Tensor Accelerators to Support Multiple Compression Formats. - Eric Qin 001; Geonhwa Jeong; William Won; Sheng-Chun Kao; Hyoukjun Kwon; Sudarshan Srinivasan; Dipankar Das 002; Gordon Euhyun Moon; Sivasankaran Rajamanickam; Tushar Krishna (IPDPS, 2021)

A Lightweight Error-Resiliency Mechanism for Deep Neural Networks. - Brunno F. Goldstein; Victor da Cruz Ferreira; Sudarshan Srinivasan; Dipankar Das 002; Alexandre Solon Nery; Sandip Kundu; Felipe M. G. França (ISQED, 2021)