High performance ΣΔ closed loop accelerometer. - Dipankar Nag; Kevin Tshun Chuan Chai (ISIC, 2014)

A 6 nV/√Hz high precision Analog Front-End with sub-µV input offset for MEMS accelerometer. - Dipankar Nag (ISIC, 2016)

Digital Compensation Method for the Path Delay Mismatches in GRO-TDC. - Pyoungwon Park; Dipankar Nag; Dan Lei Yan; Muthukumaraswamy Annamalai Arasu (J. Circuits Syst. Comput., 2016)

A 1.2 V, 0.84 pJ/conv.-Step ultra-low power capacitance to digital converter for microphone based auscultation. - Neelakantan Narasimman; Dipankar Nag; Kevin Tshun Chuan Chai; Tony T. Kim (CICC, 2017)