Optimizing yield in global routing. - Dirk Müller 003 (ICCAD, 2006)

Yield Improvement by Local Wiring Redundancy. - Jeanne Bickford; Jason Hibbeler; Markus Bühler; Jürgen Koehl; Dirk Müller 003; Sven Peyer; Christian Schulte 002 (ISQED, 2006)

On the complexity of the planar directed edge-disjoint paths problem. - Dirk Müller 003 (Math. Program., 2006)

Fast Resource Sharing in VLSI Routing - Dirk Müller 003 (2010)

Faster min-max resource sharing in theory and practice. - Dirk Müller 003; Klaus Radke; Jens Vygen (Math. Program. Comput., 2011)

Algorithms and data structures for fast and good VLSI routing. - Michael Gester; Dirk Müller 003; Tim Nieberg; Christian Panten; Christian Schulte 002; Jens Vygen (DAC, 2012)

BonnRoute: Algorithms and data structures for fast and good VLSI routing. - Michael Gester; Dirk Müller 003; Tim Nieberg; Christian Panten; Christian Schulte 002; Jens Vygen (ACM Trans. Design Autom. Electr. Syst., 2013)

Global Routing with Inherent Static Timing Constraints. - Stephan Held; Dirk Müller 003; Daniel Rotter; Vera Traub; Jens Vygen (ICCAD, 2015)

Detailed Routing Algorithms for Advanced Technology Nodes. - Markus Ahrens; Michael Gester; Niko Klewinghaus; Dirk Müller 003; Sven Peyer; Christian Schulte 002; Gustavo E. Téllez (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Global Routing With Timing Constraints. - Stephan Held; Dirk Müller 003; Daniel Rotter; Rudolf Scheifele; Vera Traub; Jens Vygen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

Vehicle routing with time-dependent travel times: Theory, practice, and benchmarks. - Jannis Blauth; Stephan Held; Dirk Müller 003; Niklas Schlomberg; Vera Traub; Thorben Tröbst; Jens Vygen (Discret. Optim., 2024)