Logic Locking for Hardware Security Using Voltage-Gated Spin-orbit Torque Magnetic Tunnel Junction. - Divyanshu Divyanshu; Rajat Kumar; Danial Khan; Selma Amara; Yehia Massoud (APCCAS, 2022)

Modeling of Sneaky Hardware Trojan Using Spin-orbit Torque Assisted Magnetic Tunnel Junction for High Speed Digital Circuits. - Rajat Kumar; Divyanshu Divyanshu; Danial Khan; Selma Amara; Yehia Massoud (APCCAS, 2022)

Physically Unclonable Function using GSHE driven SOT assisted MTJ for next Generation Hardware Security Applications. - Divyanshu Divyanshu; Rajat Kumar; Danial Khan; Selma Amara; Yehia Massoud (MWSCAS, 2022)

Physically Unclonable Function Using GSHE Driven SOT Assisted p-MTJ for Next Generation Hardware Security Applications. - Divyanshu Divyanshu; Rajat Kumar; Danial Khan; Selma Amara; Yehia Massoud (IEEE Access, 2022)

Logic Locking Using Emerging 2T/3T Magnetic Tunnel Junctions for Hardware Security. - Divyanshu Divyanshu; Rajat Kumar; Danial Khan; Selma Amara; Yehia Massoud (IEEE Access, 2022)

Finite-State-Machine inspired Hardware Watermark using Spin-Orbit Torque operated MTJ. - Divyanshu Divyanshu; Rajat Kumar; Danial Khan; Selma Amara; Yehia Massoud (ISCAS, 2023)

Cybersecurity Regulation of Smart Mobility Hardware Systems: Case Assessment for Spin-Based MTJ Devices. - Divyanshu Divyanshu; Rajat Kumar; Danial Khan; Selma Amara; Yehia Massoud (SM, 2023)

FSM Inspired Unconventional Hardware Watermark Using Field-Assisted SOT-MTJ. - Divyanshu Divyanshu; Rajat Kumar; Danial Khan; Selma Amara; Yehia Massoud (IEEE Access, 2023)

Cryptographic Hash Function using current-induced magnetization switching in nano-magnetic devices. - Divyanshu Divyanshu; Aijaz H. Lone; Meng Tang; Daniel N. Rahimi; Selma Amara; Gianluca Setti (ISCAS, 2025)

Hardware Aware Polyalphabetic Cipher Design Using Spin-Orbit Torque Controlled Spintronic Devices. - Divyanshu Divyanshu; Aijaz H. Lone; Meng Tang; Camelia Florica; Selma Amara; Gianluca Setti (IEEE Trans. Circuits Syst. II Express Briefs, 2025)