FPGA platform based digital design education. - Dmitri Mihhailov; Margus Kruus; Alexander Sudnitson (CompSysTech, 2008)

FSM decomposition with application to FPGA synthesis. - Alexander Sudnitson; Dmitri Mihhailov; Margus Kruus; Konstantin Tarletski (CompSysTech, 2009)

Advanced topics of FSM design using FPGA educational boards and web-based tools. - Alexander Sudnitson; Dmitri Mihhailov; Margus Kruus (EWDTS, 2010)

Application-specific hardware accelerator for implementing recursive sorting algorithms. - Dmitri Mihhailov; Valery Sklyarov; Iouliia Skliarova; Alexander Sudnitson (FPT, 2010)

Parallel FPGA-Based Implementation of Recursive Sorting Algorithms. - Dmitri Mihhailov; Valery Sklyarov; Iouliia Skliarova; Alexander Sudnitson (ReConFig, 2010)

Synthesis and Implementation of Hierarchical Finite State Machines with Implicit Modules. - Valery Sklyarov; Iouliia Skliarova; Dmitri Mihhailov; Alexander Sudnitson (ReConFig, 2010)

Recursion and hierarchy in digital design and prototyping: a case study. - Dmitri Mihhailov; Margus Kruus; Valery Sklyarov; Iouliia Skliarova; Alexander Sudnitson (CompSysTech, 2011)

High-performance hardware accelerators for sorting and managing priorities. - Valery Sklyarov; Iouliia Skliarova; Dmitri Mihhailov; Alexander Sudnitson (DDECS, 2011)

Implementation in FPGA of Address-Based Data Sorting. - Valery Sklyarov; Iouliia Skliarova; Dmitri Mihhailov; Alexander Sudnitson (FPL, 2011)

EEG Analyzer prototype based on FPGA. - Maksim Jenihhin; Maksim Gorev; Vadim Pesonen; Dmitri Mihhailov; Peeter Ellervee; Hiie Hinrikus; Maie Bachmann; Jaanus Lass (ISPA, 2011)

Performance evaluation for FPGA-based processing of tree-like structures. - Valery Sklyarov; Iouliia Skliarova; Dmitri Mihhailov; Alexander Sudnitson (ICECS, 2012)

Optimization of address-based data sorting unit with external memory support. - Dmitri Mihhailov; Artjem Rjabov; Valery Sklyarov; Iouliia Skliarova; Alexander Sudnitson (CompSysTech, 2013)

Address-based data processing over N-ary trees. - Valery Sklyarov; Iouliia Skliarova; Margus Kruus; Dmitri Mihhailov; Alexander Sudnitson (EUROCON, 2013)

Implementation of address-based data sorting on different FPGA platforms. - Dmitri Mihhailov; Alexander Sudnitson; Valery Sklyarov; Iouliia Skliarova (EWDTS, 2013)

HLS-based Optimization of Tau Triggering Algorithm for LHC: a case study. - Natalia Cherezova; Dmitri Mihhailov; Sergei Devadze; Artur Jutman (CoRR, 2022)

Architectural Solutions for High-Speed Data Processing Demands of CERN LHC Detectors with FPGA and High-Level Synthesis. - Sergei Devadze; Christine Elizabeth Nielsen; Dmitri Mihhailov; Peeter Ellervee (NorCAS, 2024)