A Generic Framework for Rapid Prototyping of System-on-Chip Designs. - Dmitrij Kissler; Alexey Kupriyanov; Frank Hannig; Dirk Koch; Jürgen Teich (CDES, 2006)

A highly parameterizable parallel processor array architecture. - Dmitrij Kissler; Frank Hannig; Alexey Kupriyanov; Jürgen Teich (FPT, 2006)

Hardware Cost Analysis for Weakly Programmable Processor Arrays. - Dmitrij Kissler; Frank Hannig; Alexey Kupriyanov; Jürgen Teich (SoC, 2006)

An Architecture Description Language for Massively Parallel Processor Architectures. - Alexey Kupriyanov; Frank Hannig; Dmitrij Kissler; Jürgen Teich; Rainer Schaffer; Renate Merker (MBMV, 2006)

A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template. - Dmitrij Kissler; Frank Hannig; Alexey Kupriyanov; Jürgen Teich (ReCoSoC, 2006)

Modeling of Interconnection Networks in Massively Parallel Processor Architectures. - Alexey Kupriyanov; Frank Hannig; Dmitrij Kissler; Jürgen Teich; Julien Lallet; Olivier Sentieys; Sébastien Pillement (ARCS, 2007)

A Unified Retargetable Design Methodology for Dedicated and Re-Programmable Multiprocessor Arrays: Case Study and Quantitative Evaluation. - Jürgen Teich; Frank Hannig; Holger Ruckdeschel; Hritam Dutta; Dmitrij Kissler; Andrej Stravet (ERSA, 2007)

Massively Parallel Processor Architectures: A Co-design Approach. - Hritam Dutta; Frank Hannig; Alexey Kupriyanov; Dmitrij Kissler; Jürgen Teich; Rainer Schaffer; Sebastian Siegel; Renate Merker; Bernard Pottier (ReCoSoC, 2007)

Efficient event-driven simulation of parallel processor architectures. - Alexey Kupriyanov; Dmitrij Kissler; Frank Hannig; Jürgen Teich (SCOPES, 2007)

Coarse-grained reconfiguration. - Sven Eisenhardt; Thomas Schweizer; Julio A. de Oliveira Filho; Tobias Oppold; Wolfgang Rosenstiel; Alexander Thomas; Jürgen Becker 001; Frank Hannig; Dmitrij Kissler; Hritam Dutta; Jürgen Teich; Heiko Hinkelmann; et al. (FPL, 2008)

Power-Efficient Reconfiguration Control in Coarse-Grained Dynamically Reconfigurable Architectures. - Dmitrij Kissler; Andreas Strawetz; Frank Hannig; Jürgen Teich (J. Low Power Electron., 2009)

A holistic approach for tightly coupled reconfigurable parallel processors. - Hritam Dutta; Dmitrij Kissler; Frank Hannig; Alexey Kupriyanov; Jürgen Teich; Bernard Pottier (Microprocess. Microsystems, 2009)

Scalable Many-Domain Power Gating in Coarse-Grained Reconfigurable Processor Arrays. - Dmitrij Kissler; D. Gran; Zoran Salcic; Frank Hannig; Jürgen Teich (IEEE Embed. Syst. Lett., 2011)

Efficient Evaluation of Power/Area/Latency Design Trade-Offs for Coarse-Grained Reconfigurable Processor Arrays. - Dmitrij Kissler; Frank Hannig; Jürgen Teich (J. Low Power Electron., 2011)

Power-Efficient Tightly-Coupled Processor Arrays for Digital Signal Processing. - Dmitrij Kissler (2012)