CATAPULT: Concurrent Automatic Testing Allowing Parallelization and Using Limited Topology. - Rhonda Kay Gaede; Don E. Ross; M. Ray Mercer; Kenneth M. Butler (DAC, 1988)

Heuristics to Compute Variable Orderings for Efficient Manipulation of Ordered Binary Decision Diagrams. - Kenneth M. Butler; Don E. Ross; Rohit Kapur; M. Ray Mercer (DAC, 1991)

Fast functional evaluation of candidate OBDD variable orderings. - Don E. Ross; Kenneth M. Butler; Rohit Kapur; M. Ray Mercer (EURO-DAC, 1991)

Exact ordered binary decision diagram size when representing classes of symmetric functions. - Don E. Ross; Kenneth M. Butler; M. Ray Mercer (J. Electron. Test., 1991)

Functional Approaches to Generating Orderings for Efficient Symbolic Representations. - M. Ray Mercer; Rohit Kapur; Don E. Ross (DAC, 1992)

The roles of controllability and observability in design for test. - Kenneth M. Butler; Rohit Kapur; M. Ray Mercer; Don E. Ross (VTS, 1992)

An Accurate Delay Model for BiCMOS Gates and Off-chip Drivers. - Sherif H. K. Embabi; R. Damodaran; R. Bhagwan; Don E. Ross (ISCAS, 1993)

Testability of one dimensional ILAs under multiple faults. - Murali M. R. Gala; Karan L. Watson; Don E. Ross (VTS, 1993)

Signal probability calculations using partial functional manipulation. - Ravishankar Kodavarti; Don E. Ross (VTS, 1993)

LFSR based deterministic hardware for at-speed BIST. - Beena Vasudevan; Don E. Ross; Murali M. R. Gala; Karan L. Watson (VTS, 1993)

Linear finite state machine for lD ILAs. - Murali M. R. Gala; Peter Utama; Don E. Ross; Karan L. Watson (VTS, 1994)

Efficient variable ordering and partial representation algorithm. - Jawahar Jain; Dinos Moundanos; James R. Bitner; Jacob A. Abraham; Donald S. Fussell; Don E. Ross (VLSI Design, 1995)

Built-in self test for C-testable ILA's. - Murali M. R. Gala; Don E. Ross; Karan L. Watson; Beena Vasudevan; Peter Utama (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

Conversion of small functional test sets of nonscan blocks to scan patterns. - Don E. Ross; Tim Wood 001; Grady Giles (ITC, 2000)

Memory BIST Using ESP. - Xiaogang Du; Sudhakar M. Reddy; Don E. Ross; Wu-Tung Cheng; Joseph Rayhawk (VTS, 2004)