Placement for Clock Period Minimization With Multiple Wave Propagation. - Donald A. Joy; Maciej J. Ciesielski (DAC, 1991)

Layer assignment for printed circuit boards and integrated circuits. - Donald A. Joy; Maciej J. Ciesielski (Proc. IEEE, 1992)

Clock period minimization with wave pipelining. - Donald A. Joy; Maciej J. Ciesielski (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)