Reliability Modeling for Fault-Tolerant Computers. - Willard G. Bouricius; William C. Carter; Donald C. Jessep; Peter R. Schneider; Aspi B. Wadia (IEEE Trans. Computers, 1971)

A Simple Self-Testing Decoder Checking Circuit. - William C. Carter; Keith A. Duke; Donald C. Jessep (IEEE Trans. Computers, 1971)

Logic Design for Dynamic and Interactive Recovery. - William C. Carter; Donald C. Jessep; Aspi B. Wadia; Peter R. Schneider; Willard G. Bouricius (IEEE Trans. Computers, 1971)