A Technique for Reconfiguring Two Dimensional VLSI Arrays. - Fabrizio Lombardi; Donatella Sciuto; Renato Stefanelli (RTSS, 1987)

A reconfiguration algorithm for wafer-scale integration of systolic arrays. - Leonardo Jervis; Donatella Sciuto (Microprocess. Microprogramming, 1987)

Array partitioning: a methodology for reconfigurability and reconfiguration problems. - Fausto Distante; Fabrizio Lombardi; Donatella Sciuto (ICCD, 1988)

Behavioral testing of multilevel system software. - Fausto Distante; Donatella Sciuto (Microprocess. Microprogramming, 1988)

On Functional Testing of Array Processors. - Donatella Sciuto; Fabrizio Lombardi (IEEE Trans. Computers, 1988)

An algorithm for functional reconfiguration of fixed-size arrays. - Fabrizio Lombardi; Donatella Sciuto; Renato Stefanelli (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988)

Linear testability conditions for two-dimensional arrays. - Fabrizio Lombardi; Donatella Sciuto (Microprocess. Microprogramming, 1989)

Functional testing and verification of array systems. - Donatella Sciuto; Fabrizio Lombardi (Microprocess. Microsystems, 1989)

A Routing Algorithm for Harvesting Multipipeline Arrays with Small Intercell and Pipeline Delays. - Peter Koo; Fabrizio Lombardi; Donatella Sciuto (ICCAD, 1990)

Evaluation and improvement of fault coverage for verification and validation of protocols. - Yinan N. Shen; Fabrizio Lombardi; Donatella Sciuto (SPDP, 1990)

Testing of serial input convolvers. - Luca Breveglieri; Luigi Dadda; Donatella Sciuto (Microprocessing and Microprogramming, 1990)

An approach to a design for testability personal consultant. - Giacomo Buonanno; A. Burri; Franco Fummi; Donatella Sciuto (Microprocessing and Microprogramming, 1990)

Optimization techniques for multiple output function synthesis. - Giacomo Buonanno; Donatella Sciuto; Renato Stefanelli (EURO-DAC, 1991)

Protocol Conformance Testing by Discriminating UIO Sequences. - Xiao Sun 002; Yinan N. Shen; Fabrizio Lombardi; Donatella Sciuto (PSTV, 1991)

Testability conditions for two-dimensional bilateral arrays. - Donatella Sciuto (Integr., 1991)

Multiple stuck-at faults detection in CMOS combinational gates. - Giacomo Buonanno; Fabrizio Lombardi; Donatella Sciuto; Y.-N. Sken (Microprocessing and Microprogramming, 1991)

The Patricia testability analysis tool. - M. Hadjinicolaeu; N. Burgess; Donatella Sciuto; G. Buananno; Patrizia Cavalloro; Giuseppe Zaza (Microprocessing and Microprogramming, 1991)

Testing and diagnosis ofFFT arrays. - Anna Antola; Mariagiovanna Sami; Donatella Sciuto (J. VLSI Signal Process., 1991)

A multi level testability assistant for VLSI design. - Massimo Bombana; Giacomo Buonanno; Patrizia Cavalloro; Donatella Sciuto; Giuseppe Zaza (EURO-DAC, 1992)

Constant testability of combinational cellular tree structures. - Fabrizio Lombardi; Donatella Sciuto (J. Electron. Test., 1992)

A behavioral approach to testability analysis for neural networks. - Vincenzo Piuri; Mariagiovanna Sami; Donatella Sciuto; Renato Stefanelli (Microprocess. Microprogramming, 1992)

Reduction of Fault Detection Costs through Testable Design of Sequential Architectures with Signal Feedbacks. - Massimo Bombana; Giacomo Buonanno; Patrizia Cavalloro; Fabrizio Ferrandi; Donatella Sciuto; Giuseppe Zaza (DFT, 1993)

Fault Detection in Sequential Circuits through Functional Testing. - Giacomo Buonanno; Franco Fummi; Donatella Sciuto (DFT, 1993)

On the minimal test set for single fault location. - Xiao Sun 002; Fabrizio Lombardi; Donatella Sciuto (EURO-DAC, 1993)

Functional Fault Models and Gate Level Coverage for Sequential Architectures. - Giacomo Buonanno; Franco Fummi; Donatella Sciuto (ICCD, 1993)

Functional Testing and Constrained Synthesis of Sequential Architectures. - Giacomo Buonanno; Franco Fummi; Donatella Sciuto (ISCAS, 1993)

An Expert Solution to Functional Testability Analysis of VLSI Circuits. - Massimo Bombana; Giacomo Buonanno; Patrizia Cavalloro; Fabrizio Ferrandi; Donatella Sciuto; Giuseppe Zaza (SEKE, 1993)

New CMOS Structures for the Synthesis of Dominant Functions. - Giacomo Buonanno; Donatella Sciuto; Renato Stefanelli (VLSI Design, 1993)

Fault detection in TFCMOS/DFCMOS combinational gates. - Giacomo Buonanno; Fabrizio Lombardi; Donatella Sciuto; Yinan N. Shen (Integr., 1993)

Concurrently self-checking structures for Fsms. - M. G. Sami; Donatella Sciuto; Renato Stefanelli (Microprocess. Microprogramming, 1993)

A methodology for control-dominated systems codesign. - Stefano Antoniazzi; Alessandro Balboni; William Fornaciari; Donatella Sciuto (CODES, 1994)

A CMOS Fault Tolerant Architecture for Swith-Level Faults. - Cristiana Bolchini; Giacomo Buonanno; Donatella Sciuto; Renato Stefanelli (DFT, 1994)

Test Generation for Stuck-at and Gate-Delay Faults in Sequential Circuits: A Mixed Functional/Structural Method. - Franco Fummi; Donatella Sciuto; Micaela Serra (DFT, 1994)

Synthesis of Multi-level Self-Checking Logic. - Fabio Salice; Mariagiovanna Sami; Donatella Sciuto (DFT, 1994)

From Behavioral Description to Systolic Array Based Architectures. - Alessandro Balboni; Claudio Costi; Franco Fummi; Donatella Sciuto (EDAC-ETC-EUROASIC, 1994)

A Functional Approach to Delay Faults Test Generation for Sequential Circuits. - Franco Fummi; Donatella Sciuto; Micaela Serra (EDAC-ETC-EUROASIC, 1994)

The role of VHDL within the TOSCA hardware/software codesign framework. - Donatella Sciuto; Stefano Antoniazzi; Alessandro Balboni; William Fornaciari (EURO-DAC, 1994)

HW/SW Codesign for Embedded Telecom Systems. - Stefano Antoniazzi; Alessandro Balboni; William Fornaciari; Donatella Sciuto (ICCD, 1994)

CMOS Reliability Improvements Through a New Fault Tolerant Technique. - Cristiana Bolchini; Giacomo Buonanno; Donatella Sciuto; Renato Stefanelli (ISCAS, 1994)

Two-Dimensional Sequential Array Architectures: Design for Testability Approaches. - Cristiana Bolchini; Franco Fummi; Donatella Sciuto (ISCAS, 1994)

Constraint Generation & Placement for Automatic Layout Design of Analog Integrated Circuits. - Margherita Pillan; Donatella Sciuto (ISCAS, 1994)

Innovative Structures for CMOS Combinational Gates Synthesis. - Giacomo Buonanno; Donatella Sciuto; Renato Stefanelli (IEEE Trans. Computers, 1994)

ALADIN: a multilevel testability analyzer for VLSI system design. - Massimo Bombana; Giacomo Buonanno; Patrizia Cavalloro; Fabrizio Ferrandi; Donatella Sciuto; Giuseppe Zaza (IEEE Trans. Very Large Scale Integr. Syst., 1994)

Automatic clock tree generation in ASIC designs. - Alessandro Balboni; Claudio Costi; A. Pellencin; M. Quadrini; Donatella Sciuto (ED&TC, 1995)

Sequential logic minimization based on functional testability. - Franco Fummi; Donatella Sciuto; Micaela Serra (ED&TC, 1995)

Self-checking FSMs based on a constant distance state encoding. - Cristiana Bolchini; R. Montandon; Fabio Salice; Donatella Sciuto (DFT, 1995)

Testable synthesis of high complex control devices. - Franco Fummi; U. Rovati; Donatella Sciuto (EURO-DAC, 1995)

Synthesis for testability of large complexity controllers. - Franco Fummi; Donatella Sciuto; M. Serro (ICCD, 1995)

An Output/State Encoding for Self-Checking Finite State Machine. - Cristiana Bolchini; Donatella Sciuto (ISCAS, 1995)

Data Path Testability Analysis Based on BDDs. - Giacomo Buonanno; Fabrizio Ferrandi; Donatella Sciuto (ISCAS, 1995)

Behavior of Self-Checking Checkers for 1-out-of-3 Codes Based on Pass-Transistor Logic. - Giacomo Buonanno; Fabio Salice; Donatella Sciuto (ISCAS, 1995)

GECO: A Tool for Automatic Generation of Error Control Codes for Computer Applications. - Luca Penzo; Donatella Sciuto; Cristina Silvano (ISCAS, 1995)

A new switching-level approach to multiple-output functions synthesis. - Cristiana Bolchini; Giacomo Buonanno; Donatella Sciuto; Renato Stefanelli (VLSI Design, 1995)

VLSI design of systematic odd-weight-column byte error detecting SEC-DED codes. - Luca Penzo; Donatella Sciuto; Cristina Silvano (VLSI Design, 1995)

TIES: A testability increase expert system for VLSI design. - Giacomo Buonanno; Franco Fummi; Donatella Sciuto (J. Electron. Test., 1995)

A new DFT methodology for sequential circuits. - Claudio Costi; Micaela Serra; Donatella Sciuto (J. Electron. Test., 1995)

Testability of artificial neural networks: A behavioral approach. - Vincenzo Piuri; Mariagiovanna Sami; Donatella Sciuto (J. Electron. Test., 1995)

Construction techniques for systematic SEC-DED codes with single byte error detection and partial correction capability for computer memory systems. - Luca Penzo; Donatella Sciuto; Cristina Silvano (IEEE Trans. Inf. Theory, 1995)

Partitioning and Exploration Strategies in the TOSCA Co-Design Flow. - Alessandro Balboni; William Fornaciari; Donatella Sciuto (CODES, 1996)

Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques. - Fabrizio Ferrandi; Franco Fummi; Enrico Macii; Massimo Poncino; Donatella Sciuto (DAC, 1996)

A Parametric Design of a Built-in Self-Test FIFO Embedded Memory. - Stefano Barbagallo; Monica Lobetti Bodoni; Davide Medina; Gabriel de Blasio; M. Ferloni; Franco Fummi; Donatella Sciuto (DFT, 1996)

Fault detection and fault tolerance issues at CMOS level through AUED encoding. - Cristiana Bolchini; Giacomo Buonanno; Donatella Sciuto; Renato Stefanelli (DFT, 1996)

Redundant Faults in TSC Networks: Definition and Removal. - Cristiana Bolchini; Fabio Salice; Donatella Sciuto (DFT, 1996)

BDD-based testability estimation of VHDL designs. - Enrico Macii; Massimo Poncino; Fabrizio Ferrandi; Franco Fummi; Donatella Sciuto (EURO-DAC, 1996)

Software methodologies for VHDL code static analysis based on flow graphs. - Donatella Sciuto; Luciano Baresi; Cristiana Bolchini (EURO-DAC, 1996)

Test Generation for Networks of Interacting FSMs Using Symbolic Techniques. - Fabrizio Ferrandi; Franco Fummi; Enrico Macii; Massimo Poncino; Donatella Sciuto (Great Lakes Symposium on VLSI, 1996)

The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems. - Alessandro Balboni; William Fornaciari; Massimo Vincenzi; Donatella Sciuto (ISSS, 1996)

Co-synthesis and co-simulation of control-dominated embedded systems. - Alessandro Balboni; William Fornaciari; Donatella Sciuto (Des. Autom. Embed. Syst., 1996)

FsmTest: Functional test generation for sequential circuits. - G. Buonannoa; Franco Fummi; Donatella Sciuto; Fabrizio Lombardi (Integr., 1996)

VHDL( VHSIC Hardware Description Language). - Donatella Sciuto (J. Syst. Archit., 1996)

A Flexible Model for Evaluating the Behavior of Hardware/Software Systems. - Alberto Allara; S. Filipponi; Fabio Salice; William Fornaciari; Donatella Sciuto (CODES, 1997)

A novel methodology for designing TSC networks based on the parity bit code. - Cristiana Bolchini; Fabio Salice; Donatella Sciuto (ED&TC, 1997)

Designing Ad-Hoc Codes for the Realization of Fault Tolerant CMOS Networks. - Cristiana Bolchini; Giacomo Buonanno; M. Cozzini; Donatella Sciuto; Renato Stefanelli (DFT, 1997)

Designing Networks with Error Detection Properties through the Fault-Error Relation. - Cristiana Bolchini; Donatella Sciuto; Fabio Salice (DFT, 1997)

Asymptotic Zero-Transition Activity Encoding for Address Busses in Low-Power Microprocessor-Based Systems. - Luca Benini; Giovanni De Micheli; Enrico Macii; Donatella Sciuto; Cristina Silvano (Great Lakes Symposium on VLSI, 1997)

Parity Bit Code: Achieving a Complete Fault Coverage in the Design of TSC Combinational Networks. - Cristiana Bolchini; Fabio Salice; Donatella Sciuto (Great Lakes Symposium on VLSI, 1997)

How an "Evolving" Fault Model Improves the Behavioral Test Generation. - Giacomo Buonanno; Fabrizio Ferrandi; L. Ferrandi; Franco Fummi; Donatella Sciuto (Great Lakes Symposium on VLSI, 1997)

Improving Design Turnaround Time via Two-Levels Hw/Sw Co-Simulation. - Alberto Allara; S. Filipponi; William Fornaciari; Fabio Salice; Donatella Sciuto (ICCD, 1997)

Application of a Testing Framework to VHDL Descriptions at Different Abstraction Levels. - M. Bacis; Giacomo Buonanno; Fabrizio Ferrandi; Franco Fummi; Luca Gerli; Donatella Sciuto (ICCD, 1997)

A TSC Evaluation Function for Combinational Circuits. - Cristiana Bolchini; Donatella Sciuto; Fabio Salice (ICCD, 1997)

Implicit test pattern generation constrained to cellular automata embedding. - Franco Fummi; Donatella Sciuto (VTS, 1997)

A Two-Level Cosimulation Environment. - William Fornaciari; Donatella Sciuto (Computer, 1997)

Testing Core-Based Systems: A Symbolic Methodology. - Fabrizio Ferrandi; Franco Fummi; Donatella Sciuto; Enrico Macii; Massimo Poncino (IEEE Des. Test Comput., 1997)

A complete testing strategy based on interacting and hierarchical FSMs. - Franco Fummi; Donatella Sciuto (Integr., 1997)

A VHDL-based approach for power estimation of embedded systems. - William Fornaciari; Paolo Gubian; Donatella Sciuto; Cristina Silvano (J. Syst. Archit., 1997)

Special section on VHDL. - Donatella Sciuto (J. Syst. Archit., 1997)

Functional design for testability of control-dominated architectures. - Franco Fummi; U. Rovati; Donatella Sciuto (ACM Trans. Design Autom. Electr. Syst., 1997)

A Model for System-Level Timed Analysis and Profiling. - Alberto Allara; William Fornaciari; Fabio Salice; Donatella Sciuto (DATE, 1998)

Address Bus Encoding Techniques for System-Level Power Optimization. - Luca Benini; Giovanni De Micheli; Donatella Sciuto; Enrico Macii; Cristina Silvano (DATE, 1998)

Fault Analysis in Networks with Concurrent Error Detection Properties. - Cristiana Bolchini; Fabio Salice; Donatella Sciuto (DATE, 1998)

Systematic AUED Codes for Self-Checking Architectures. - Donatella Sciuto; Cristina Silvano; Renato Stefanelli (DFT, 1998)

VHDL Testability Analysis Based on Fault Clustering and Implicit Fault Injection. - F. S. Bietti; Fabrizio Ferrandi; Franco Fummi; Donatella Sciuto (Great Lakes Symposium on VLSI, 1998)

System-level performance estimation strategy for sw and hw. - Alberto Allara; Carlo Brandolese; William Fornaciari; Fabio Salice; Donatella Sciuto (ICCD, 1998)

Automatic VHDL restructuring for RTL synthesis optimization and testability improvement. - D. Corvino; Italo Epicoco; Fabrizio Ferrandi; Franco Fummi; Donatella Sciuto (ICCD, 1998)

Concurrent Error Detection at Architectural Level. - Cristiana Bolchini; William Fornaciari; Fabio Salice; Donatella Sciuto (ISSS, 1998)

Implicit test generation for behavioral VHDL models. - Fabrizio Ferrandi; Franco Fummi; Donatella Sciuto (ITC, 1998)

Fault Analysis for Networks with Concurrent Error Detection. - Cristiana Bolchini; Fabio Salice; Donatella Sciuto (IEEE Des. Test Comput., 1998)

Partitioning of Hardware-Software Embedded Systems: A Metrics-based Approach. - Alessandro Balboni; William Fornaciari; Donatella Sciuto (Integr. Comput. Aided Eng., 1998)

Clock skew reduction in ASIC logic design: a methodology for clock tree management. - Alessandro Balboni; Claudio Costi; Massimo Pellencin; Andrea Quadrini; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998)

Testability analysis and behavioral testing of the Hopfield neural paradigm. - Cesare Alippi; Franco Fummi; Vincenzo Piuri; Mariagiovanna Sami; Donatella Sciuto (IEEE Trans. Very Large Scale Integr. Syst., 1998)

Power estimation of embedded systems: a hardware/software codesign approach. - William Fornaciari; Paolo Gubian; Donatella Sciuto; Cristina Silvano (IEEE Trans. Very Large Scale Integr. Syst., 1998)

Automatic generation of error control codes for computer applications. - Franco Fummi; Donatella Sciuto; Cristina Silvano (IEEE Trans. Very Large Scale Integr. Syst., 1998)

HW/SW Co-design of Embedded Systems. - William Fornaciari; Donatella Sciuto (Ada-Europe, 1999)

Power estimation for architectural exploration of HW/SW communication on system-level buses. - William Fornaciari; Donatella Sciuto; Cristina Silvano (CODES, 1999)

Symbolic Functional Vector Generation for VHDL Specifications. - Fabrizio Ferrandi; Franco Fummi; Luca Gerli; Donatella Sciuto (DATE, 1999)

Influence of Caching and Encoding on Power Dissipation of System-Level Buses for Embedded Systems. - William Fornaciari; Donatella Sciuto; Cristina Silvano (DATE, 1999)

A Synthesis Methodology Aimed at Improving the Quality of TSC Devices. - Cristiana Bolchini; Luigi Pomante; Donatella Sciuto; Fabio Salice (DFT, 1999)

Increase the Behavioral Fault Model Accuracy Using High-Level Synthesis Information. - Marco Brera; Fabrizio Ferrandi; Donatella Sciuto; Franco Fummi (DFT, 1999)

Power Estimation of System-Level Buses for Microprocessor-Based Architectures: A Case Study. - William Fornaciari; Donatella Sciuto; Cristina Silvano (ICCD, 1999)

Synthesis for Testability of Highly Complex Controllers by Functional Redundancy Removal. - Franco Fummi; Donatella Sciuto; Micaela Serra (IEEE Trans. Computers, 1999)

Energy estimation for 32-bit microprocessors. - Carlo Brandolese; William Fornaciari; Fabio Salice; Donatella Sciuto (CODES, 2000)

Power optimization of system-level address buses based on software profiling. - William Fornaciari; M. Polentarutti; Donatella Sciuto; Cristina Silvano (CODES, 2000)

Instruction-level power estimation for embedded VLIW cores. - Mariagiovanna Sami; Donatella Sciuto; Cristina Silvano; Vittorio Zaccaria (CODES, 2000)

An instruction-level functionally-based energy estimation model for 32-bits microprocessors. - Carlo Brandolese; William Fornaciari; Fabio Salice; Donatella Sciuto (DAC, 2000)

BIST Architectures Selection Based on Behavioral Testing. - Giuseppe Biasoli; Fabrizio Ferrandi; Donatella Sciuto; Alessandro Fin; Franco Fummi (DFT, 2000)

An approach to functional testing of VLIW architectures. - M. Beardo; Francesco Bruschi; Fabrizio Ferrandi; Donatella Sciuto (HLDVT, 2000)

Power Exploration for Embedded VLIW Architectures. - Mariagiovanna Sami; Donatella Sciuto; Cristina Silvano; Vittorio Zaccaria (ICCAD, 2000)

An Application of Genetic Algorithms and BDDs to Functional Testing. - Fabrizio Ferrandi; Donatella Sciuto; Alessandro Fin; Franco Fummi (ICCD, 2000)

ICT diffusion and strategic role within Italian SMEs. - Giacomo Buonanno; Stefano Gramignoli; Aurelio Ravarini; Marco Tagliavini; Donatella Sciuto (IRMA Conference, 2000)

Low-power state assignment techniques for finite state machines. - Paolo Bacchetta; Lidia Daldoss; Donatella Sciuto; Cristina Silvano (ISCAS, 2000)

A Multi-Level Strategy for Software Power Estimation. - Carlo Brandolese; William Fornaciari; Luigi Pomante; Fabio Salice; Donatella Sciuto (ISSS, 2000)

Testability Alternatives Exploration through Functional Testing. - Fabrizio Ferrandi; G. Fornara; Donatella Sciuto; G. Ferrara; Franco Fummi (VTS, 2000)

Guest Editor's Introduction: Design Tools for Embedded Systems. - Donatella Sciuto (IEEE Des. Test Comput., 2000)

An extended-UIO-based method for protocol conformance testing. - Giacomo Buonanno; Franco Fummi; Donatella Sciuto (J. Syst. Archit., 2000)

A Hierarchical Test Generation Approach for Large Controllers. - Franco Fummi; Donatella Sciuto (IEEE Trans. Computers, 2000)

Symbolic optimization of interacting controllers based onredundancy identification and removal. - Fabrizio Ferrandi; Franco Fummi; Enrico Macii; Massimo Poncino; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Design of VHDL-based totally self-checking finite-state machine and data-path descriptions. - Cristiana Bolchini; R. Montandon; Fabio Salice; Donatella Sciuto (IEEE Trans. Very Large Scale Integr. Syst., 2000)

Source-level execution time estimation of C programs. - Carlo Brandolese; William Fornaciari; Fabio Salice; Donatella Sciuto (CODES, 2001)

A design framework to efficiently explore energy-delay tradeoffs. - William Fornaciari; Donatella Sciuto; Cristina Silvano; Vittorio Zaccaria (CODES, 2001)

Functional test generation for behaviorally sequential models. - Fabrizio Ferrandi; G. Ferrara; Donatella Sciuto; Alessandro Fin; Franco Fummi (DATE, 2001)

Exploiting data forwarding to reduce the power budget of VLIW embedded processors. - Mariagiovanna Sami; Donatella Sciuto; Cristina Silvano; Vittorio Zaccaria; Roberto Zafalon (DATE, 2001)

An Assembly-Level Execution-Time Model for Pipelined Architectures. - Giovanni Beltrame; Carlo Brandolese; William Fornaciari; Fabio Salice; Donatella Sciuto; Vito Trianni (ICCAD, 2001)

Designing Reliable Embedded Systems Based on 32 Bit Microprocessors. - Cristiana Bolchini; Fabio Salice; Donatella Sciuto (IOLTW, 2001)

Fast system-level exploration of memory architectures driven by energy-delay metrics. - William Fornaciari; Donatella Sciuto; Cristina Silvano; Vittorio Zaccaria (ISCAS (4), 2001)

Dynamic modeling of inter-instruction effects for execution time estimation. - Giovanni Beltrame; Carlo Brandolese; William Fornaciari; Fabio Salice; Donatella Sciuto; Vito Trianni (ISSS, 2001)

On-line fault detection in a hardware/software co-design environment. - Cristiana Bolchini; Luigi Pomante; Fabio Salice; Donatella Sciuto (ISSS, 2001)

Pursuing coherence in software process assessment and improvement. - Fabiano Cattaneo; Alfonso Fuggetta; Donatella Sciuto (Softw. Process. Improv. Pract., 2001)

An efficient heuristic approach to solve the unate covering problem. - Roberto Cordone; Fabrizio Ferrandi; Donatella Sciuto; Roberto Wolfler Calvo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

Metrics for design space exploration of heterogeneous multiprocessor embedded systems. - Donatella Sciuto; Fabio Salice; Luigi Pomante; William Fornaciari (CODES, 2002)

Energy estimation and optimization of embedded VLIW processors based on instruction clustering. - Andrea Bona; Mariagiovanna Sami; Donatella Sciuto; Vittorio Zaccaria; Cristina Silvano; Roberto Zafalon (DAC, 2002)

An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW Cores. - Andrea Bona; Mariagiovanna Sami; Donatella Sciuto; Vittorio Zaccaria; Cristina Silvano; Roberto Zafalon (DATE, 2002)

Error Simulation Based on the SystemC Design Description Language. - Francesco Bruschi; Michele Chiamenti; Fabrizio Ferrandi; Donatella Sciuto (DATE, 2002)

Functional Verification for SystemC Descriptions Using Constraint Solving. - Fabrizio Ferrandi; Michele Rendine; Donatella Sciuto (DATE, 2002)

Designing Self-Checking FPGAs through Error Detection Codes. - Cristiana Bolchini; Fabio Salice; Donatella Sciuto (DFT, 2002)

A System Level Approach in Designing Dual-Duplex Fault Tolerant Embedded Systems. - Cristiana Bolchini; Luigi Pomante; Fabio Salice; Donatella Sciuto (IOLTW, 2002)

Modeling Assembly Instruction Timing in Superscalar Architectures. - William Fornaciari; Vito Trianni; Carlo Brandolese; Donatella Sciuto; Fabio Salice; Giovanni Beltrame (ISSS, 2002)

A Sensitivity-Based Design Space Exploration Methodology for Embedded Systems. - William Fornaciari; Donatella Sciuto; Cristina Silvano; Vittorio Zaccaria (Des. Autom. Embed. Syst., 2002)

Reliability Properties Assessment at System Level: A Co-Design Framework. - Cristiana Bolchini; Luigi Pomante; Fabio Salice; Donatella Sciuto (J. Electron. Test., 2002)

The Impact of Source Code Transformations on Software Power and Energy Consumption. - Carlo Brandolese; William Fornaciari; Fabio Salice; Donatella Sciuto (J. Circuits Syst. Comput., 2002)

Behavioral test generation for the selection of BIST logic. - Giuseppe Biasoli; Fabrizio Ferrandi; Alessandro Fin; Franco Fummi; Donatella Sciuto (J. Syst. Archit., 2002)

Test Generation and Testability Alternatives Exploration of Critical Algorithms for Embedded Applications. - Fabrizio Ferrandi; Franco Fummi; Donatella Sciuto (IEEE Trans. Computers, 2002)

Static power modeling of 32-bit microprocessors. - Carlo Brandolese; Fabio Salice; William Fornaciari; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

An instruction-level energy model for embedded VLIW architectures. - Mariagiovanna Sami; Donatella Sciuto; Cristina Silvano; Vittorio Zaccaria (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

Low-power data forwarding for VLIW embedded architectures. - Mariagiovanna Sami; Donatella Sciuto; Cristina Silvano; Vittorio Zaccaria; Roberto Zafalon (IEEE Trans. Very Large Scale Integr. Syst., 2002)

Mining interesting patterns from hardware-software codesign data with the learning classifier system XCS. - Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto (IEEE Congress on Evolutionary Computation, 2003)

Static analysis of transaction-level models. - Giovanni Agosta; Francesco Bruschi; Donatella Sciuto (DAC, 2003)

Library Functions Timing Characterization for Source-Level Analysis. - Carlo Brandolese; William Fornaciari; Fabio Salice; Donatella Sciuto (DATE, 2003)

Transaction Based Design: Another Buzzword or the Solution to a Design Problem? - Heinz-Josef Schlebusch; Gary Smith 001; Donatella Sciuto; Daniel Gajski; Carsten Mielenz; Christopher K. Lennard; Frank Ghenassia; Stuart Swan; Joachim Kunkel (DATE, 2003)

An Integrated Design Approach for Self-Checking FPGAs. - Cristiana Bolchini; Fabio Salice; Donatella Sciuto; R. Zavaglia (DFT, 2003)

An Internal Representation Model for System-Level Co-Design of Heterogeneous Multiprocessor Embedded System. - Fabio Salice; William Fornaciari; Luigi Pomante; Donatella Sciuto (FDL, 2003)

A Methodology for the Efficient Architectural Exploration of Energy-Delay Trade-offs for Embedded Systems. - Lorenzo Salvemini; Mariagiovanna Sami; Donatella Sciuto; Cristina Silvano; Vittorio Zaccaria; Roberto Zafalon (SAC, 2003)

The design of reliable devices for mission-critical applications. - Cristiana Bolchini; Luigi Pomante; Fabio Salice; Donatella Sciuto (IEEE Trans. Instrum. Meas., 2003)

Identification of design errors through functional testing. - Fabrizio Ferrandi; Franco Fummi; Graziano Pravadelli; Donatella Sciuto (IEEE Trans. Reliab., 2003)

Plug-in of power models in the StepNP exploration platform: analysis of power/performance trade-offs. - Giovanni Beltrame; Gianluca Palermo; Donatella Sciuto; Cristina Silvano (CASES, 2004)

Analysis and Modeling of Energy Reducing Source Code Transformations. - Carlo Brandolese; William Fornaciari; Fabio Salice; Donatella Sciuto (DATE, 2004)

SystemC and SystemVerilog: Where do They Fit? Where are They Going? - Donatella Sciuto; Grant Martin; Wolfgang Rosenstiel; Stuart Swan; Frank Ghenassia; Peter Flake; Johny Srouji (DATE, 2004)

Synthesis of Dynamic Class Loading Specifications on Reconfigurable Hardware. - Giovanni Agosta; Francesco Bruschi; Donatella Sciuto (DELTA, 2004)

System-level metrics for hardware/software architectural mapping. - Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto; Mara Tanelli (DELTA, 2004)

Reliable System Co-Design: The FIR Case Study. - Cristiana Bolchini; Antonio Miele; Fabio Salice; Donatella Sciuto; Luigi Pomante (DFT, 2004)

System Level Hardware-Software Design Exploration with XCS. - Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto (GECCO (2), 2004)

Virtual Community in the Classroom: An Innovating Tool for Elearning. - Francesco Bruschi; Paolo Faverio; Robert Hodges; L. Mari; Daniele Restelli; Donatella Sciuto (EDUTECH, 2004)

Exploring the Role of Inter-Organizational Information Systems within SMEs Aggregations. - Giacomo Buonanno; Federico Pigni; Aurelio Ravarini; Donatella Sciuto (Bled eConference, 2005)

Reliable System Specification for Self-Checking Data-Paths. - Cristiana Bolchini; Fabio Salice; Donatella Sciuto; Luigi Pomante (DATE, 2005)

A model of soft error effects in generic IP processors. - Cristiana Bolchini; Antonio Miele; Fabio Salice; Donatella Sciuto (DFT, 2005)

A Data Oriented Approach to the Design of Reconfigurable Stream Decoders. - Giovanni Agosta; Francesco Bruschi; Marco D. Santambrogio; Donatella Sciuto (ESTIMedia, 2005)

Caronte: A Complete Methodology for the Implementation of Partially Dynamically Self-Reconfiguring Systems on FPGA Platforms. - Alberto Donato; Fabrizio Ferrandi; Massimo Redaelli; Marco D. Santambrogio; Donatella Sciuto (FCCM, 2005)

Aspect Orientation in System Level Design. - Giovanni Agosta; Francesco Bruschi; Donatella Sciuto (FDL, 2005)

Mapping Interface Method Calls over OCP Buses. - Francesco Bruschi; Federico Moro; Donatella Sciuto (FDL, 2005)

Using Critical Success Factors for Assessing Critical Activities in ERP Implementation within SMEs. - Paolo Faverio; Donatella Sciuto; Giacomo Buonanno (ICEIS (1), 2005)

A Design Methodology for Dynamic Reconfiguration: The Caronte Architecture. - Fabrizio Ferrandi; Marco D. Santambrogio; Donatella Sciuto (IPDPS, 2005)

Operating system support for dynamically reconfigurable SoC architectures. - Alberto Donato; Fabrizio Ferrandi; Marco D. Santambrogio; Donatella Sciuto (SoCC, 2005)

Caronte: A methodology for the Implementation of Partially dynamically Self-Reconfiguring Systems on FPGA Platforms. - Alberto Donato; Fabrizio Ferrandi; Massimo Redaelli; Marco D. Santambrogio; Donatella Sciuto (VLSI-SoC, 2005)

Reducing the complexity of instruction-level power models for VLIW processors. - Andrea Bona; Mariagiovanna Sami; Donatella Sciuto; Cristina Silvano; Vittorio Zaccaria; Roberto Zafalon (Des. Autom. Embed. Syst., 2005)

A Framework for the Functional Verification of SystemC Models. - Francesco Bruschi; Fabrizio Ferrandi; Donatella Sciuto (Int. J. Parallel Program., 2005)

Factors affecting ERP system adoption: A comparative analysis between SMEs and large companies. - Giacomo Buonanno; Paolo Faverio; Federico Pigni; Aurelio Ravarini; Donatella Sciuto; Marco Tagliavini (J. Enterp. Inf. Manag., 2005)

Using speculative computation and parallelizing techniques to improve scheduling of control based designs. - Roberto Cordone; Fabrizio Ferrandi; Marco D. Santambrogio; Gianluca Palermo; Donatella Sciuto (ASP-DAC, 2006)

Decision-theoretic exploration of multiProcessor platforms. - Giovanni Beltrame; Dario Bruschi; Donatella Sciuto; Cristina Silvano (CODES+ISSS, 2006)

Exploiting TLM and object introspection for system-level simulation. - Giovanni Beltrame; Donatella Sciuto; Cristina Silvano; Damien Lyonnard; Chuck Pilkington (DATE, 2006)

Combined software and hardware techniques for the design of reliable IP processors. - Maurizio Rebaudengo; Luca Sterpone; Massimo Violante; Cristiana Bolchini; Antonio Miele; Donatella Sciuto (DFT, 2006)

Synthesis of Object Oriented Models on Reconfigurable Hardware. - Giovanni Agosta; Francesco Bruschi; Marco D. Santambrogio; Donatella Sciuto (ERSA, 2006)

SyCERS: a SystemC Design Exploration Framework for SoC Reconfigurable Architecture. - Carlo Amicucci; Fabrizio Ferrandi; Marco D. Santambrogio; Donatella Sciuto (ERSA, 2006)

Partial Dynamic Reconfiguration: The Caronte Approach. A New Degree of Freedom in the HW/SW Codesign. - Marco D. Santambrogio; Donatella Sciuto (FPL, 2006)

Combining hardware reconfiguration and adaptive computation for a novel SoC design methodology. - Vincenzo Rana; Marco D. Santambrogio; Seda Ogrenci Memik; Donatella Sciuto (FPT, 2006)

Dynamic Reconfiguration: Core Relocation via Partial Bitstreams Filtering with Minimal Overhead. - Fabrizio Ferrandi; Marco Novati; Massimo Morandi; Marco D. Santambrogio; Donatella Sciuto (SoC, 2006)

Automatic Test Pattern Generation with BOA. - Tiziana Gravagnoli; Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto (PPSN, 2006)

Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA. - Simone Borgio; Davide Bosisio; Fabrizio Ferrandi; Matteo Monchiero; Marco D. Santambrogio; Donatella Sciuto; Antonino Tumeo (ICSAMOS, 2006)

A Power-Efficient Methodology for Mapping Applications on Multi-Processor, System-on-Chip Architectures. - Giovanni Beltrame; Donatella Sciuto; Cristina Silvano (VLSI-SoC (Selected Papers), 2006)

An Application Mapping Methodology and Case Study for Multi-Processor On-Chip Architectures. - Giovanni Beltrame; Donatella Sciuto; Cristina Silvano; Pierre G. Paulin; Essaid Bensoudane (VLSI-SoC, 2006)

A graph-coloring approach to the allocation and tasks scheduling for reconfigurable architectures. - Marco Giorgetta; Marco D. Santambrogio; Donatella Sciuto; Paola Spoletini (VLSI-SoC, 2006)

Fast IP-Core Generation in a Partial Dynamic Reconfiguration Workflow. - Matteo Murgida; Alessandro Panella; Vincenzo Rana; Marco D. Santambrogio; Donatella Sciuto (VLSI-SoC, 2006)

Affinity-Driven System Design Exploration for Heterogeneous Multiprocessor SoC. - Carlo Brandolese; William Fornaciari; Luigi Pomante; Fabio Salice; Donatella Sciuto (IEEE Trans. Computers, 2006)

A Self-Reconfigurable Implementation of the JPEG Encoder. - Antonino Tumeo; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (ASAP, 2007)

Fitness inheritance in evolutionary and multi-objective high-level synthesis. - Christian Pilato; Gianluca Palermo; Antonino Tumeo; Fabrizio Ferrandi; Donatella Sciuto; Pier Luca Lanzi (IEEE Congress on Evolutionary Computation, 2007)

A Unified Approach to Canonical Form-based Boolean Matching. - Giovanni Agosta; Francesco Bruschi; Gerardo Pelosi; Donatella Sciuto (DAC, 2007)

A Framework for Reliability Assessment and Enhancement in Multi-Processor Systems-On-Chip. - Giovanni Beltrame; Cristiana Bolchini; Luca Fossati; Antonio Miele; Donatella Sciuto (DFT, 2007)

Task Partitioning for the Scheduling on Reconfigurable Systems driven by Specification Self-Similarity. - Matteo Giani; Massimo Redaelli; Marco D. Santambrogio; Donatella Sciuto (ERSA, 2007)

An efficient cost-based canonical form for Boolean matching. - Giovanni Agosta; Francesco Bruschi; Donatella Sciuto (ACM Great Lakes Symposium on VLSI, 2007)

A design kit for a fully working shared memory multiprocessor on FPGA. - Antonino Tumeo; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (ACM Great Lakes Symposium on VLSI, 2007)

A novel SoC design methodology combining adaptive software and reconfigurable hardware. - Marco D. Santambrogio; Seda Ogrenci Memik; Vincenzo Rana; Umut A. Acar; Donatella Sciuto (ICCAD, 2007)

Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs. - Fabrizio Ferrandi; Luca Fossati; Marco Lattuada 001; Gianluca Palermo; Donatella Sciuto; Antonino Tumeo (IESS, 2007)

Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux. - Vincenzo Rana; Marco D. Santambrogio; Donatella Sciuto; Boris Kettelhoit; Markus Köster; Mario Porrmann; Ulrich Rückert 001 (IPDPS, 2007)

Dynamic Reconfigurability in Embedded System Design. - Vincenzo Rana; Marco D. Santambrogio; Donatella Sciuto (ISCAS, 2007)

Two Novel Approaches to Online Partial Bitstream Relocation in a Dynamically Reconfigurable System. - Simone Corbetta; Fabrizio Ferrandi; Massimo Morandi; Marco Novati; Marco D. Santambrogio; Donatella Sciuto (ISVLSI, 2007)

A Hash-based Approach for Functional Regularity Extraction During Logic Synthesis. - Angelo P. E. Rosiello; Fabrizio Ferrandi; Davide Pandini; Donatella Sciuto (ISVLSI, 2007)

A Pipelined Fast 2D-DCT Accelerator for FPGA-based SoCs. - Antonino Tumeo; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (ISVLSI, 2007)

An Internal Partial Dynamic Reconfiguration Implementation of the JPEG Encoder for Low-Cost FPGAsb. - Antonino Tumeo; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (ISVLSI, 2007)

An Evolutionary Approach to Area-Time Optimization of FPGA designs. - Fabrizio Ferrandi; Pier Luca Lanzi; Gianluca Palermo; Christian Pilato; Donatella Sciuto; Antonino Tumeo (ICSAMOS, 2007)

An Interrupt Controller for FPGA-based Multiprocessors. - Antonino Tumeo; Marco Branca; Lorenzo Camerini; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (ICSAMOS, 2007)

An adaptive genetic algorithm for dynamically reconfigurable modules allocation. - Vincenzo Rana; Chiara Sandionigi; Marco D. Santambrogio; Donatella Sciuto (VLSI-SoC, 2007)

Multi-Accuracy Power and Performance Transaction-Level Modeling. - Giovanni Beltrame; Donatella Sciuto; Cristina Silvano (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Guest Editorial [intro. to the special issue on the 2006 IEEE/ACM Design, Automation and Test in Europe Conference]. - Georges G. E. Gielen; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

High-Level Modeling and Exploration of Reconfigurable MPSoCs. - Giovanni Beltrame; Luca Fossati; Donatella Sciuto (AHS, 2008)

Lightweight DMA management mechanisms for multiprocessors on FPGA. - Antonino Tumeo; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (ASAP, 2008)

ReSP: A non-intrusive Transaction-Level Reflective MPSoC Simulation Platform for design space exploration. - Giovanni Beltrame; Cristiana Bolchini; Luca Fossati; Antonio Miele; Donatella Sciuto (ASP-DAC, 2008)

The Shining embedded system design methodology based on self dynamic reconfigurable architectures. - Carlo Curino; Luca Fossati; Vincenzo Rana; Francesco Redaelli; Marco D. Santambrogio; Donatella Sciuto (ASP-DAC, 2008)

High-level synthesis with multi-objective genetic algorithm: A comparative encoding analysis. - Christian Pilato; Daniele Loiacono; Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto (IEEE Congress on Evolutionary Computation, 2008)

Concurrency emulation and analysis of parallel applications for multi-processor system-on-chip co-design. - Giovanni Beltrame; Luca Fossati; Donatella Sciuto (CODES+ISSS, 2008)

Task Scheduling with Configuration Prefetching and Anti-Fragmentation techniques on Dynamically Reconfigurable Systems. - Francesco Redaelli; Marco D. Santambrogio; Donatella Sciuto (DATE, 2008)

A Dual-Priority Real-Time Multiprocessor System on FPGA for Automotive Applications. - Antonino Tumeo; Marco Branca; Lorenzo Camerini; Marco Ceriani; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (DATE, 2008)

A Generation Flow for Self-Reconfiguration Controllers Customization. - Andrea Cuoccio; Paolo Roberto Grassi; Vincenzo Rana; Marco D. Santambrogio; Donatella Sciuto (DELTA, 2008)

A Requirements-Driven Reconfigurable SoC Communication Infrastructure Design Flow. - Alessandro Meroni; Vincenzo Rana; Marco D. Santambrogio; Donatella Sciuto (DELTA, 2008)

A Design Workflow for the Identification of Area Constraints in Dynamic Reconfigurable Systems. - Alessio Montone; Marco D. Santambrogio; Donatella Sciuto (DELTA, 2008)

Fault Models and Injection Strategies in SystemC Specifications. - Cristiana Bolchini; Antonio Miele; Donatella Sciuto (DSD, 2008)

An architecture for dynamically reconfigurable real time audio processing systems. - Francesco Bruschi; Vincenzo Rana; Donatella Sciuto (ESTIMedia, 2008)

Operating system support for online partial dynamic reconfiguration management. - Marco D. Santambrogio; Vincenzo Rana; Donatella Sciuto (FPL, 2008)

A design flow tailored for self dynamic reconfigurable architecture. - Fabio Cancare; Marco D. Santambrogio; Donatella Sciuto (IPDPS, 2008)

HARPE: A Harvard-based processing element tailored for partial dynamic reconfigurable architectures. - Alessio Montone; Vincenzo Rana; Marco D. Santambrogio; Donatella Sciuto (IPDPS, 2008)

Design methodology for partial dynamic reconfiguration: a new degree of freedom in the HW/SW codesign. - Marco D. Santambrogio; Donatella Sciuto (IPDPS, 2008)

A Multi-objective Genetic Algorithm for Design Space Exploration in High-Level Synthesis. - Fabrizio Ferrandi; Pier Luca Lanzi; Daniele Loiacono; Christian Pilato; Donatella Sciuto (ISVLSI, 2008)

Core Allocation and Relocation Management for a Self Dynamically Reconfigurable Architecture. - Massimo Morandi; Marco Novati; Marco D. Santambrogio; Donatella Sciuto (ISVLSI, 2008)

A light-weight Network-on-Chip architecture for dynamically reconfigurable systems. - Simone Corbetta; Vincenzo Rana; Marco D. Santambrogio; Donatella Sciuto (ICSAMOS, 2008)

Ant colony optimization for mapping and scheduling in heterogeneous multiprocessor systems. - Antonino Tumeo; Christian Pilato; Fabrizio Ferrandi; Donatella Sciuto; Pier Luca Lanzi (ICSAMOS, 2008)

A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication. - Vincenzo Rana; David Atienza; Marco D. Santambrogio; Donatella Sciuto; Giovanni De Micheli (VLSI-SoC (Selected Papers), 2008)

Reconfigurable Computing and Hardware/Software Codesign. - Toomas P. Plaks; Marco D. Santambrogio; Donatella Sciuto (EURASIP J. Embed. Syst., 2008)

Software and Hardware Techniques for SEU Detection in IP Processors. - Cristiana Bolchini; Antonio Miele; Fabio Rebaudengo; Fabio Salice; Donatella Sciuto; Luca Sterpone; Massimo Violante (J. Electron. Test., 2008)

Improving evolutionary exploration to area-time optimization of FPGA designs. - Christian Pilato; Antonino Tumeo; Gianluca Palermo; Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto (J. Syst. Archit., 2008)

Static Analysis of Transaction-Level Communication Models. - Giovanni Agosta; Francesco Bruschi; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

An application-centered design flow for self reconfigurable systems implementation. - Fabio Cancare; Marco D. Santambrogio; Donatella Sciuto (ASP-DAC, 2009)

Prototyping pipelined applications on a heterogeneous FPGA multiprocessor virtual platform. - Antonino Tumeo; Marco Branca; Lorenzo Camerini; Marco Ceriani; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (ASP-DAC, 2009)

Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems. - Vincenzo Rana; Srinivasan Murali; David Atienza; Marco D. Santambrogio; Luca Benini; Donatella Sciuto (CODES+ISSS, 2009)

Mapping pipelined applications onto heterogeneous embedded systems: a bayesian optimization algorithm based approach. - Antonino Tumeo; Marco Branca; Lorenzo Camerini; Christian Pilato; Pier Luca Lanzi; Fabrizio Ferrandi; Donatella Sciuto (CODES+ISSS, 2009)

A real-time application design methodology for MPSoCs. - Giovanni Beltrame; Luca Fossati; Donatella Sciuto (DATE, 2009)

HW/SW methodologies for synchronization in FPGA multiprocessors. - Antonino Tumeo; Christian Pilato; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (FPGA, 2009)

A runtime relocation based workflow for self dynamic reconfigurable systems design. - Marco D. Santambrogio; Massimo Morandi; Marco Novati; Donatella Sciuto (FPL, 2009)

Evolutionary algorithms for the mapping of pipelined applications onto heterogeneous embedded systems. - Marco Branca; Lorenzo Camerini; Fabrizio Ferrandi; Pier Luca Lanzi; Christian Pilato; Donatella Sciuto; Antonino Tumeo (GECCO, 2009)

Reconfigurable NoC design flow for multiple applications run-time mapping on FPGA devices. - Dario Cozzi; Claudia Farè; Alessandro Meroni; Vincenzo Rana; Marco D. Santambrogio; Donatella Sciuto (ACM Great Lakes Symposium on VLSI, 2009)

On-line task management for a reconfigurable cryptographic architecture. - Ivan Beretta; Vincenzo Rana; Marco D. Santambrogio; Donatella Sciuto (IPDPS, 2009)

A multiprocessor self-reconfigurable JPEG2000 encoder. - Antonino Tumeo; Simone Borgio; Davide Bosisio; Matteo Monchiero; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (IPDPS, 2009)

A Highly Parallel FPGA-based Evolvable Hardware Architecture. - Fabio Cancare; Marco Castagna; Matteo Renesto; Donatella Sciuto (PARCO, 2009)

A Transform-Parametric Approach to Boolean Matching. - Giovanni Agosta; Francesco Bruschi; Gerardo Pelosi; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

ReSP: A Nonintrusive Transaction-Level Reflective MPSoC Simulation Platform for Design Space Exploration. - Giovanni Beltrame; Luca Fossati; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Partitioning and Scheduling of Task Graphs on Partially Dynamically Reconfigurable FPGAs. - Roberto Cordone; Francesco Redaelli; Massimo Redaelli; Marco D. Santambrogio; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Internal and External Bitstream Relocation for Partial Dynamic Reconfiguration. - Simone Corbetta; Massimo Morandi; Marco Novati; Marco D. Santambrogio; Donatella Sciuto; Paola Spoletini (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Mapping and scheduling of parallel C applications with ant colony optimization onto heterogeneous reconfigurable MPSoCs. - Fabrizio Ferrandi; Christian Pilato; Donatella Sciuto; Antonino Tumeo (ASP-DAC, 2010)

Efficient pattern matching on GPUs for intrusion detection systems. - Antonino Tumeo; Oreste Villa; Donatella Sciuto (Conf. Computing Frontiers, 2010)

A reconfigurable multiprocessor architecture for a reliable face recognition implementation. - Antonino Tumeo; Francesco Regazzoni 001; Gianluca Palermo; Fabrizio Ferrandi; Donatella Sciuto (DATE, 2010)

Operating system runtime management of partially dynamically reconfigurable embedded systems. - Marco D. Santambrogio; Vincenzo Rana; Ivan Beretta; Donatella Sciuto (ESTIMedia, 2010)

A Compact Transactional Memory Multiprocessor System on FPGA. - Matteo Pusceddu; Simone Ceccolini; Gianluca Palermo; Donatella Sciuto; Antonino Tumeo (FPL, 2010)

Multiprocessor systems-on-chip synthesis using multi-objective evolutionary computation. - Marco Ceriani; Fabrizio Ferrandi; Pier Luca Lanzi; Donatella Sciuto; Antonino Tumeo (GECCO, 2010)

A novel design framework for the design of reconfigurable systems based on NoCs. - Vincenzo Rana; Donatella Sciuto (ACM Great Lakes Symposium on VLSI, 2010)

Wirelength driven floorplacement for FPGA-based partial reconfigurable systems. - Alessio Montone; Marco D. Santambrogio; Donatella Sciuto (IPDPS Workshops, 2010)

Analysis and validation of partially dynamically reconfigurable architecture based on Xilinx FPGAs. - Marco D. Santambrogio; Paolo Roberto Grassi; Davide Candiloro; Donatella Sciuto (IPDPS Workshops, 2010)

Run-time mapping of applications on FPGA-based reconfigurable systems. - Ivan Beretta; Vincenzo Rana; David Atienza; Donatella Sciuto (ISCAS, 2010)

A direct bitstream manipulation approach for Virtex4-based evolvable systems. - Fabio Cancare; Marco D. Santambrogio; Donatella Sciuto (ISCAS, 2010)

Designing and validating access policies to reconfigurable resources in Multiprocessor Systems on chip. - Fabio Arlati; Francesco Bruschi; Donatella Sciuto (ICSAMOS, 2010)

A design workflow for dynamically reconfigurable multi-FPGA systems. - Alessandro Panella; Marco D. Santambrogio; Francesco Redaelli; Fabio Cancare; Donatella Sciuto (VLSI-SoC, 2010)

HArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms. - Koen Bertels; Vlad Mihai Sima; Yana Yankova; Georgi Kuzmanov; Wayne Luk; José Gabriel F. Coutinho; Fabrizio Ferrandi; Christian Pilato; Marco Lattuada 001; Donatella Sciuto; Andrea Michelotti (IEEE Micro, 2010)

Guest Editors' Introduction: Special Section on System-Level Design of Reliable Architectures. - Cristiana Bolchini; Donatella Sciuto (IEEE Trans. Computers, 2010)

Decision-Theoretic Design Space Exploration of Multiprocessor Platforms. - Giovanni Beltrame; Luca Fossati; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Ant Colony Heuristic for Mapping and Scheduling Tasks and Communications on Heterogeneous Embedded Systems. - Fabrizio Ferrandi; Pier Luca Lanzi; Christian Pilato; Donatella Sciuto; Antonino Tumeo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Placement and Floorplanning in Dynamically Reconfigurable FPGAs. - Alessio Montone; Marco D. Santambrogio; Donatella Sciuto; Seda Ogrenci Memik (ACM Trans. Reconfigurable Technol. Syst., 2010)

Emulating Transactional Memory on FPGA Multiprocessors. - Matteo Pusceddu; Simone Ceccolini; Antonino Tumeo; Gianluca Palermo; Donatella Sciuto (ARCS, 2011)

HERA: Hardware evolution over reconfigurable architectures. - Davide B. Bartolini; Fabio Cancare; Matteo Carminati; Donatella Sciuto (CHANGE@ASPLOS, 2011)

A design methodology to implement memory accesses in high-level synthesis. - Christian Pilato; Fabrizio Ferrandi; Donatella Sciuto (CODES+ISSS, 2011)

An efficient Quantum-Dot Cellular Automata adder. - Francesco Bruschi; Francesco Perini; Vincenzo Rana; Donatella Sciuto (DATE, 2011)

A Hybrid Mapping-Scheduling Technique for Dynamically Reconfigurable Hardware. - Juan Antonio Clemente; Vincenzo Rana; Donatella Sciuto; Ivan Beretta; David Atienza (FPL, 2011)

ReBit: A Tool to Manage and Analyse FPGA-Based Reconfigurable Systems. - Marco D. Santambrogio; Andrea Cazzaniga; Alessandra Bonetto; Donatella Sciuto (IPDPS Workshops, 2011)

Dedicated hardware accelerators for the epistatic analysis of human genetic data. - Fabio Cancare; Alessandro Marin; Donatella Sciuto (ICSAMOS, 2011)

Island-Based Adaptable Embedded System Design. - Ivan Beretta; Vincenzo Rana; David Atienza; Donatella Sciuto (IEEE Embed. Syst. Lett., 2011)

Interorganisational systems within SMEs aggregations: an exploratory study on information requirements of an industrial district. - Federico Pigni; Aurelio Ravarini; Giacomo Buonanno; Donatella Sciuto (Int. J. Inf. Technol. Manag., 2011)

Floorplacement for Partial Reconfigurable FPGA-Based Systems. - Alessio Montone; Marco D. Santambrogio; Francesco Redaelli; Donatella Sciuto (Int. J. Reconfigurable Comput., 2011)

A Mapping Flow for Dynamically Reconfigurable Multi-Core System-on-Chip Design. - Ivan Beretta; Vincenzo Rana; David Atienza; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Applying dynamic reconfiguration in the mobile robotics domain: A case study on computer vision algorithms. - Federico Nava; Donatella Sciuto; Marco D. Santambrogio; Stefan Herbrechtsmeier; Mario Porrmann; Ulf Witkowski; Ulrich Rückert 001 (ACM Trans. Reconfigurable Technol. Syst., 2011)

B2IRS: A Technique to Reduce BAN-BAN Interferences in Wireless Sensor Networks. - Paolo Roberto Grassi; Vincenzo Rana; Ivan Beretta; Donatella Sciuto (BSN, 2012)

Knowledge-based design space exploration of wireless sensor networks. - Paolo Roberto Grassi; Ivan Beretta; Vincenzo Rana; David Atienza; Donatella Sciuto (CODES+ISSS, 2012)

MPower: Towards an Adaptive Power Management System for Mobile Devices. - Alessandra Bonetto; Matteo Ferroni; Domenico Matteo; A. A. Nacci; Matteo Mazzucchelli; Donatella Sciuto; Marco D. Santambrogio (CSE, 2012)

Metronome: operating system level performance management via self-adaptive computing. - Filippo Sironi; Davide B. Bartolini; Simone Campanoni; Fabio Cancare; Henry Hoffmann; Donatella Sciuto; Marco D. Santambrogio (DAC, 2012)

An adaptive approach for online fault management in many-core architectures. - Cristiana Bolchini; Antonio Miele; Donatella Sciuto (DATE, 2012)

On the Development of a Runtime Reconfigurable Multicore System-on-Chip. - Andrea Cazzaniga; Gianluca Durelli; Christian Pilato; Donatella Sciuto; Marco D. Santambrogio (DSD, 2012)

Tacit Consent: A Technique to Reduce Redundant Transmissions from Spatially Correlated Nodes in Wireless Sensor Networks. - Paolo Roberto Grassi; Vincenzo Rana; Ivan Beretta; Donatella Sciuto (DSD, 2012)

Energy-Aware FPGA-based Architecture for Wireless Sensor Networks. - Paolo Roberto Grassi; Donatella Sciuto (DSD, 2012)

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration. - Dionisios N. Pnevmatikatos; Tobias Becker; Andreas Brokalakis; Karel Bruneel; Georgi Gaydadjiev; Wayne Luk; Kyprianos Papadimitriou; Ioannis Papaefstathiou; Oliver Pell; Christian Pilato; M. Robart; Marco D. Santambrogio; et al. (DSD, 2012)

Automated real-time atrial fibrillation detection on a wearable wireless sensor platform. - Francisco J. Rincón; Paolo Roberto Grassi; Nadia Khaled; David Atienza; Donatella Sciuto (EMBC, 2012)

An open-source design and validation platform for reconfigurable systems. - Alessandra Bonetto; Andrea Cazzaniga; Gianluca Durelli; Christian Pilato; Donatella Sciuto; Marco D. Santambrogio (FPL, 2012)

On the automatic integration of hardware accelerators into FPGA-based embedded systems. - Christian Pilato; Andrea Cazzaniga; Gianluca Durelli; Andrés Otero; Donatella Sciuto; Marco D. Santambrogio (FPL, 2012)

DGECS: Description Generator for Evolved Circuits Synthesis. - Fabio Cancare; Davide B. Bartolini; Matteo Carminati; Donatella Sciuto; Marco D. Santambrogio (IPDPS Workshops, 2012)

Mini-Robot's Performance Optimization via Online Reconfiguration and HW/SW Task Scheduling. - Gianluca Durelli; Federica Cresci; Donatella Sciuto; Mario Porrmann; Marco D. Santambrogio (IPDPS Workshops, 2012)

An Enhanced Relocation Manager to Speedup Core Allocation in FPGA-based Reconfigurable Systems. - Marco D. Santambrogio; Fabio Cancare; Riccardo Cattaneo; S. Bhandariy; Donatella Sciuto (IPDPS Workshops, 2012)

An automated framework for the simulation of mapping solutions on heterogeneous MPSoCs. - Antonio Miele; Christian Pilato; Donatella Sciuto (ISSoC, 2012)

Model-based design for wireless body sensor network nodes. - Ivan Beretta; Francisco J. Rincón; Nadia Khaled; Paolo Roberto Grassi; Vincenzo Rana; David Atienza; Donatella Sciuto (LATW, 2012)

A Framework for Thermal and Performance Management. - Davide B. Bartolini; Filippo Sironi; Martina Maggio; Riccardo Cattaneo; Donatella Sciuto; Marco Domenico Santambrogio (MAD, 2012)

Automatic run-time manager generation for reconfigurable MPSoC architectures. - Gianluca Durelli; Christian Pilato; Andrea Cazzaniga; Donatella Sciuto; Marco D. Santambrogio (ReCoSoC, 2012)

Smart technologies for effective reconfiguration: The FASTER approach. - Marco D. Santambrogio; Dionisios N. Pnevmatikatos; Kyprianos Papadimitriou; Christian Pilato; Georgi Gaydadjiev; Dirk Stroobandt; Tom Davidson; Tobias Becker; Tim Todman; Wayne Luk; Alessandra Bonetto; Andrea Cazzaniga; et al. (ReCoSoC, 2012)

TaBit: A framework for task graph to bitstream generation. - Alessandra Bonetto; Andrea Cazzaniga; Gianluca Durelli; Christian Pilato; Donatella Sciuto; Marco D. Santambrogio (ICSAMOS, 2012)

On the Evolution of Hardware Circuits via Reconfigurable Architectures. - Fabio Cancare; Davide B. Bartolini; Matteo Carminati; Donatella Sciuto; Marco D. Santambrogio (ACM Trans. Reconfigurable Technol. Syst., 2012)

ThermOS: System support for dynamic thermal management of chip multi-processors. - Filippo Sironi; Martina Maggio; Riccardo Cattaneo; Giovanni F. Del Nero; Donatella Sciuto; Marco D. Santambrogio (PACT, 2013)

Ant Colony Optimization for mapping, scheduling and placing in reconfigurable systems. - Fabrizio Ferrandi; Pier Luca Lanzi; Christian Pilato; Donatella Sciuto; Antonino Tumeo (AHS, 2013)

On self-adaptive resource allocation through reinforcement learning. - Jacopo Panerati; Filippo Sironi; Matteo Carminati; Martina Maggio; Giovanni Beltrame; Piotr J. Gmytrasiewicz; Donatella Sciuto; Marco D. Santambrogio (AHS, 2013)

A2B: An integrated framework for designing heterogeneous and reconfigurable systems. - Christian Pilato; Riccardo Cattaneo; Gianluca Durelli; Alessandro Antonio Nacci; Marco Domenico Santambrogio; Donatella Sciuto (AHS, 2013)

Towards a performance-as-a-service cloud. - Davide B. Bartolini; Filippo Sironi; Martina Maggio; Gianluca Durelli; Donatella Sciuto; Marco D. Santambrogio (SoCC, 2013)

Coloring the cloud for predictable performance. - Alberto Scolari; Filippo Sironi; Davide B. Bartolini; Donatella Sciuto; Marco D. Santambrogio (SoCC, 2013)

A high-level synthesis flow for the implementation of iterative stencil loop algorithms on FPGA devices. - Alessandro Antonio Nacci; Vincenzo Rana; Francesco Bruschi; Donatella Sciuto; Ivan Beretta; David Atienza (DAC, 2013)

Morphone.OS: Context-Awareness in Everyday Life. - A. A. Nacci; Matteo Mazzucchelli; Martina Maggio; Alessandra Bonetto; Donatella Sciuto; Marco D. Santambrogio (DSD, 2013)

MPower: gain back your android battery life! - Matteo Ferroni; Andrea Cazzola; Domenico Matteo; Alessandro Antonio Nacci; Donatella Sciuto; Marco Domenico Santambrogio (UbiComp (Adjunct Publication), 2013)

The FASTER vision for designing dynamically reconfigurable systems. - Marco D. Santambrogio; Christian Pilato; Dionisios N. Pnevmatikatos; Kyprianos Papadimitriou; Dirk Stroobandt; Donatella Sciuto (ICICDT, 2013)

HERA Project's Holistic Evolutionary Framework. - Davide B. Bartolini; Matteo Carminati; Fabio Cancare; Marco D. Santambrogio; Donatella Sciuto (IPDPS Workshops, 2013)

A Flexible Interconnection Structure for Reconfigurable FPGA Dataflow Applications. - Gianluca Durelli; Alessandro Antonio Nacci; Riccardo Cattaneo; Christian Pilato; Donatella Sciuto; Marco D. Santambrogio (IPDPS Workshops, 2013)

D-RECS: A complete methodology to implement Self Dynamic Reconfigurable FPGA-based systems. - Fabio Cancare; Christian Pilato; Andrea Cazzaniga; Donatella Sciuto; Marco D. Santambrogio (ReCoSoC, 2013)

SMASH: A heuristic methodology for designing partially reconfigurable MPSoCs. - Riccardo Cattaneo; Christian Pilato; Gianluca Durelli; Marco Domenico Santambrogio; Donatella Sciuto (RSP, 2013)

Dataflow computing with Polymorphic Registers. - Catalin Bogdan Ciobanu; Georgi Gaydadjiev; Christian Pilato; Donatella Sciuto (ICSAMOS, 2013)

Design Methods for Parallel Hardware Implementation of Multimedia Iterative Algorithms. - Vincenzo Rana; Alessandro Antonio Nacci; Ivan Beretta; Marco D. Santambrogio; David Atienza; Donatella Sciuto (IEEE Des. Test, 2013)

A Simulation-Based Framework for the Exploration of Mapping Solutions on Heterogeneous MPSoCs. - Antonio Miele; Christian Pilato; Donatella Sciuto (Int. J. Embed. Real Time Commun. Syst., 2013)

Adaptive and Flexible Smartphone Power Modeling. - A. A. Nacci; Francesco Trovò; Filippo Maggi; Matteo Ferroni; Andrea Cazzola; Donatella Sciuto; Marco D. Santambrogio (Mob. Networks Appl., 2013)

Effective Reconfigurable Design: The FASTER Approach. - Dionisios N. Pnevmatikatos; Tobias Becker; Andreas Brokalakis; Georgi Nedeltchev Gaydadjiev; Wayne Luk; Kyprianos Papadimitriou; Ioannis Papaefstathiou; Danilo Pau; Oliver Pell; Christian Pilato; Marco D. Santambrogio; Donatella Sciuto; et al. (ARC, 2014)

On Power and Energy Consumption Modeling for Smart Mobile Devices. - Matteo Ferroni; Andrea Cazzola; Francesco Trovò; Donatella Sciuto; Marco Domenico Santambrogio (EUC, 2014)

cODA: An Open-Source Framework to Easily Design Context-Aware Android Apps. - Matteo Ferroni; Andrea Damiani; Alessandro Antonio Nacci; Donatella Sciuto; Marco Domenico Santambrogio (EUC, 2014)

A Perspective Vision on Complex Residential Building Management Systems. - Alessandro Antonio Nacci; Vincenzo Rana; Donatella Sciuto (EUC, 2014)

On How to Efficiently Implement Regular Expression Matching on FPGA-Based Systems. - Vincenzo Rana; Francesco Bruschi; Marco Paolieri; Donatella Sciuto; Marco Domenico Santambrogio (EUC, 2014)

On How to Design Smart Energy-Efficient Buildings. - Donatella Sciuto; Alessandro Antonio Nacci (EUC, 2014)

Improving the security and the scalability of the AES algorithm (abstract only). - Alessandro Antonio Nacci; Vincenzo Rana; Marco D. Santambrogio; Donatella Sciuto (FPGA, 2014)

SPELL: affecting thermal comfort through perceptive techniques. - Annamaria Andrea Vitali; Donatella Sciuto; Marco Spadafora; Margherita Pillan; Alessandro Antonio Nacci (UbiComp Adjunct, 2014)

PaRA-Sched: A Reconfiguration-Aware Scheduler for Reconfigurable Architectures. - Riccardo Cattaneo; Riccardo Bellini; Gianluca Durelli; Christian Pilato; Marco D. Santambrogio; Donatella Sciuto (IPDPS Workshops, 2014)

An Open-Source, Efficient, and Parameterizable Hardware Implementation of the AES Algorithm. - Alessandro Antonio Nacci; Vincenzo Rana; Donatella Sciuto; Marco Domenico Santambrogio (ISPA, 2014)

A Survey on Recent Hardware and Software-Level Cache Management Techniques. - Alberto Scolari; Filippo Sironi; Donatella Sciuto; Marco Domenico Santambrogio (ISPA, 2014)

FPGA-Based Design Using the FASTER Toolchain: The Case of STM Spear Development Board. - Fabrizio Spada; Alberto Scolari; Gianluca C. Durelli; Riccardo Cattaneo; Marco D. Santambrogio; Donatella Sciuto; Dionisios N. Pnevmatikatos; Georgi Gaydadjiev; Oliver Pell; Andreas Brokalakis; Wayne Luk; Dirk Stroobandt; et al. (ISPA, 2014)

BlueSentinel: a first approach using iBeacon for an energy efficient occupancy detection system. - Giorgio Conte; Massimo De Marchi; Alessandro Antonio Nacci; Vincenzo Rana; Donatella Sciuto (BuildSys, 2014)

A SystemC-based framework for the simulation of appliances networks in energy-aware smart spaces. - A. A. Nacci; Giovanni Bettinazzi; Christian Pilato; Vincenzo Rana; Marco D. Santambrogio; Donatella Sciuto (WF-IoT, 2014)

Looking into the Crystal Ball: From Transistors to the Smart Earth. - Alberto L. Sangiovanni-Vincentelli; Donatella Sciuto (IEEE Des. Test, 2014)

A performance-aware quality of service-driven scheduler for multicore processors. - Filippo Sironi; Donatella Sciuto; Marco D. Santambrogio (SIGBED Rev., 2014)

Automated Fine-Grained CPU Provisioning for Virtual Machines. - Davide B. Bartolini; Filippo Sironi; Donatella Sciuto; Marco D. Santambrogio (ACM Trans. Archit. Code Optim., 2014)

A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms. - Juan Antonio Clemente; Ivan Beretta; Vincenzo Rana; David Atienza; Donatella Sciuto (ACM Trans. Reconfigurable Technol. Syst., 2014)

EXTRA: Towards an Efficient Open Platform for Reconfigurable High Performance Computing. - Catalin Bogdan Ciobanu; Ana Lucia Varbanescu; Dionisios N. Pnevmatikatos; George Charitopoulos; Xinyu Niu; Wayne Luk; Marco D. Santambrogio; Donatella Sciuto; Muhammed Al Kadi; Michael Hübner 001; Tobias Becker; Georgi Gaydadjiev; et al. (CSE, 2015)

Occupancy detection via iBeacon on Android devices for smart building management. - Andrea Corna; L. Fontana; A. A. Nacci; Donatella Sciuto (DATE, 2015)

Thermal-aware floorplanning for partially-reconfigurable FPGA-based systems. - Davide Pagano; Mikel Vuka; Marco Rabozzi; Riccardo Cattaneo; Donatella Sciuto; Marco D. Santambrogio (DATE, 2015)

Experimental Evaluation and Modeling of Thermal Phenomena on Mobile Devices. - Matteo Ferroni; Alessandro Antonio Nacci; Matteo Turri; Marco Domenico Santambrogio; Donatella Sciuto (DSD, 2015)

Methods and Algorithms for the Interaction of Residential Smart Buildings with Smart Grids. - Giovanni Bettinazzi; Alessandro Antonio Nacci; Donatella Sciuto (EUC, 2015)

OpenMPower: An Open and Accessible Database About Real World Mobile Devices. - Andrea Corna; Andrea Damiani; Matteo Ferroni; Alessandro Antonio Nacci; Donatella Sciuto; Marco Domenico Santambrogio (EUC, 2015)

BuildingRules: a trigger-action based system to manage complex commercial buildings. - Alessandro Antonio Nacci; Bharathan Balaji; Paola Spoletini; Rajesh K. Gupta 001; Donatella Sciuto; Yuvraj Agarwal (UbiComp/ISWC Adjunct, 2015)

K-Ways Partitioning of Polyhedral Process Networks: A Multi-level Approach. - Riccardo Cattaneo; Mahdi Badie Moradmand; Donatella Sciuto; Marco D. Santambrogio (IPDPS Workshops, 2015)

Explicitly isolating data and computation in high level synthesis: the role of polyhedral framework. - Riccardo Cattaneo; Gabriele Pallotta; Donatella Sciuto; Marco D. Santambrogio (ReConFig, 2015)

Danger-system: Exploring new ways to manage occupants safety in smart building. - Andrea Piscitello; Francesco Paduano; Alessandro Antonio Nacci; Danny Noferi; Marco D. Santambrogio; Donatella Sciuto (WF-IoT, 2015)

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration. - Dionisios N. Pnevmatikatos; Kyprianos Papadimitriou; Tobias Becker; Peter Böhm; Andreas Brokalakis; Karel Bruneel; Catalin Bogdan Ciobanu; Tom Davidson; Georgi Gaydadjiev; Karel Heyse; Wayne Luk; Xinyu Niu; et al. (Microprocess. Microsystems, 2015)

Ruleset Minimization in Multi-tenant Smart Buildings. - Andrea Piscitello; Alessandro Antonio Nacci; Vincenzo Rana; Marco D. Santambrogio; Donatella Sciuto (CSE/EUC/DCABES, 2016)

A polyhedral model-based framework for dataflow implementation on FPGA devices of iterative stencil loops. - Giuseppe Natale; Giulio Stramondo; Pietro Bressana; Riccardo Cattaneo; Donatella Sciuto; Marco D. Santambrogio (ICCAD, 2016)

Resource-Efficient Scheduling for Partially-Reconfigurable FPGA-Based Systems. - Andrea Purgato; Davide Tantillo; Marco Rabozzi; Donatella Sciuto; Marco D. Santambrogio (IPDPS Workshops, 2016)

EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures. - Dirk Stroobandt; Ana Lucia Varbanescu; Catalin Bogdan Ciobanu; Muhammed Al Kadi; Andreas Brokalakis; George Charitopoulos; Tim Todman; Xinyu Niu; Dionisios N. Pnevmatikatos; Amit Kulkarni 002; Elias Vansteenkiste; Wayne Luk; et al. (ReCoSoC, 2016)

Sink state analysis in multi-tenant smart buildings. - Andrea Piscitello; Alessandro Antonio Nacci; Vincenzo Rana; Marco D. Santambrogio; Donatella Sciuto (RTSI, 2016)

On How to Accelerate Iterative Stencil Loops: A Scalable Streaming-Based Approach. - Riccardo Cattaneo; Giuseppe Natale; Carlo Sicignano; Donatella Sciuto; Marco Domenico Santambrogio (ACM Trans. Archit. Code Optim., 2016)

State of the Journal. - Paolo Montuschi; Edward J. McCluskey; Samarjit Chakraborty; Jason Cong; Ramón M. Rodríguez-Dagnino; Fred Douglis; Lieven Eeckhout; Gernot Heiser; Sushil Jajodia; Ruby B. Lee; Dinesh Manocha; Tomás F. Pena; et al. (IEEE Trans. Computers, 2016)

Efficient Hardware Design of Iterative Stencil Loops. - Vincenzo Rana; Ivan Beretta; Francesco Bruschi; Alessandro Antonio Nacci; David Atienza; Donatella Sciuto (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

Parallelizing the Chambolle Algorithm for Performance-Optimized Mapping on FPGA Devices. - Ivan Beretta; Vincenzo Rana; Abdulkadir Akin; Alessandro Antonio Nacci; Donatella Sciuto; David Atienza (ACM Trans. Embed. Comput. Syst., 2016)

Optimization Strategies in Design Space Exploration. - Jacopo Panerati; Donatella Sciuto; Giovanni Beltrame (Handbook of Hardware/Software Codesign, 2017)

A Scalable FPGA Design for Cloud N-Body Simulation. - Emanuele Del Sozzo; Marco Rabozzi; Lorenzo Di Tucci; Donatella Sciuto; Marco D. Santambrogio (ASAP, 2018)

FIDA: A Framework to Automatically Integrate FPGA Kernels Within Data-Science Applications. - Luca Stornaiuolo; Alberto Parravicini; Donatella Sciuto; Marco D. Santambrogio (IPDPS Workshops, 2018)

On How to Efficiently Implement Deep Learning Algorithms on PYNQ Platform. - Luca Stornaiuolo; Marco D. Santambrogio; Donatella Sciuto (ISVLSI, 2018)

Building High-Performance, Easy-to-Use Polymorphic Parallel Memories with HLS. - Luca Stornaiuolo; Marco Rabozzi; Marco D. Santambrogio; Donatella Sciuto; Catalin Bogdan Ciobanu; Giulio Stramondo; Ana Lucia Varbanescu (VLSI-SoC (Selected Papers), 2018)

HLS Support for Polymorphic Parallel Memories. - Luca Stornaiuolo; Marco Rabozzi; Donatella Sciuto; Marco D. Santambrogio; Giulio Stramondo; Catalin Bogdan Ciobanu; Ana Lucia Varbanescu (VLSI-SoC, 2018)

The Case for Polymorphic Registers in Dataflow Computing. - Catalin Bogdan Ciobanu; Georgi Gaydadjiev; Christian Pilato; Donatella Sciuto (Int. J. Parallel Program., 2018)

Mine with it or sell it: the superhashing power dilemma. - Francesco Bruschi; Vincenzo Rana; Lorenzo Gentile; Donatella Sciuto (SIGMETRICS Perform. Evaluation Rev., 2018)

MARC: A Resource Consumption Modeling Service for Self-Aware Autonomous Agents. - Matteo Ferroni; Andrea Corna; Andrea Damiani; Rolando Brondolin; John Kubiatowicz; Donatella Sciuto; Marco D. Santambrogio (ACM Trans. Auton. Adapt. Syst., 2018)

BuildingRules: A Trigger-Action-Based System to Manage Complex Commercial Buildings. - Alessandro Antonio Nacci; Vincenzo Rana; Bharathan Balaji; Paola Spoletini; Rajesh K. Gupta 001; Donatella Sciuto; Yuvraj Agarwal (ACM Trans. Cyber Phys. Syst., 2018)

FPGA-Based Embedded System Implementation of Audio Signal Alignment. - Luca Stornaiuolo; Massimo Perini; Marco D. Santambrogio; Donatella Sciuto (IPDPS Workshops, 2019)

BNNsplit: Binarized Neural Networks for embedded distributed FPGA-based computing systems. - Giorgia Fiscaletti; Marco Speziali; Luca Stornaiuolo; Marco D. Santambrogio; Donatella Sciuto (DATE, 2020)

Hardware resources analysis of BNNs splitting for FARD-based multi-FPGAs Distributed Systems. - Giorgia Fiscaletti; Marco Speziali; Luca Stornaiuolo; Marco D. Santambrogio; Donatella Sciuto (IPDPS Workshops, 2020)

EMPhASIS: An EMbedded Public Attention Stress Identification System. - Jessica Leoni; Asia Ciallella; Luca Stornaiuolo; Marco D. Santambrogio; Donatella Sciuto (IPDPS Workshops, 2020)

A Decentralized System for Fair Token Distribution and Seamless Users Onboarding. - Francesco Bruschi; Manuel Tumiati; Vincenzo Rana; Mattia Bianchi; Donatella Sciuto (ISCC, 2020)

Acknowledging Value of Personal Information: a Privacy Aware Data Market for Health and Social Research. - Francesco Bruschi; Vincenzo Rana; Alessio Pagani; Donatella Sciuto (DLT@ITASEC, 2020)

Enabling transparent hardware acceleration on Zynq SoC for scientific computing. - Luca Stornaiuolo; Filippo Carloni; Riccardo Pressiani; Giuseppe Natale; Marco D. Santambrogio; Donatella Sciuto (SIGBED Rev., 2020)

A Framework for Customizable FPGA-based Image Registration Accelerators. - Davide Conficconi; Eleonora D'Arnese; Emanuele Del Sozzo; Donatella Sciuto; Marco D. Santambrogio (FPGA, 2021)

Plaster: an Embedded FPGA-based Cluster Orchestrator for Accelerated Distributed Algorithms. - Lorenzo Farinelli; Daniele Valentino De Vincenti; Andrea Damiani; Luca Stornaiuolo; Rolando Brondolin; Marco D. Santambrogio; Donatella Sciuto (IPDPS Workshops, 2021)

A privacy preserving identification protocol for smart contracts. - Francesco Bruschi; Tommaso Paulon; Vincenzo Rana; Donatella Sciuto (ISCC, 2021)

Tunneling Trust Into the Blockchain: A Merkle Based Proof System for Structured Documents. - Francesco Bruschi; Vincenzo Rana; Alessio Pagani; Donatella Sciuto (IEEE Access, 2021)

On the Optimization of Behavioral Logic Locking for High-Level Synthesis. - Christian Pilato; Luca Collini; Luca Cassano; Donatella Sciuto; Siddharth Garg; Ramesh Karri (CoRR, 2021)

ASSURE: RTL Locking Against an Untrusted Foundry. - Christian Pilato; Animesh Basak Chowdhury; Donatella Sciuto; Siddharth Garg; Ramesh Karri (IEEE Trans. Very Large Scale Integr. Syst., 2021)

FPGA '21 source code release. - Davide Conficconi; Eleonora D'Arnese; Emanuele Del Sozzo; Donatella Sciuto; Marco Domenico Santambrogio (Zenodo, 2021)

Protecting Hardware IP Cores During High-Level Synthesis. - Christian Pilato; Donatella Sciuto; Francesco Regazzoni 001; Siddharth Garg; Ramesh Karri (Behavioral Synthesis for Hardware Security, 2022)

High-level design methods for hardware security: is it the right choice? invited. - Christian Pilato; Donatella Sciuto; Benjamin Tan 001; Siddharth Garg; Ramesh Karri (DAC, 2022)

A Protocol for On-Chain Tenders. - Francesco Bruschi; Tommaso Paulon; Vincenzo Rana; Donatella Sciuto (PerCom Workshops, 2022)

A Comprehensive Methodology to Optimize FPGA Designs via the Roofline Model. - Marco Siracusa; Emanuele Del Sozzo; Marco Rabozzi; Lorenzo Di Tucci; Samuel Williams 001; Donatella Sciuto; Marco Domenico Santambrogio (IEEE Trans. Computers, 2022)

On the Automation of Radiomics-Based Identification and Characterization of NSCLC. - Eleonora D'Arnese; Guido Walter Di Donato; Emanuele Del Sozzo; Martina Sollini; Donatella Sciuto; Marco Domenico Santambrogio (IEEE J. Biomed. Health Informatics, 2022)

Iris: Automatic Generation of Efficient Data Layouts for High Bandwidth Utilization. - Stephanie Soldavini; Donatella Sciuto; Christian Pilato (ASP-DAC, 2023)

A Bird's Eye View on Quantum Computing: Current and Future Trends. - Beatrice Branchini; Davide Conficconi; Francesco Peverelli; Donatella Sciuto; Marco D. Santambrogio (EUROCON, 2023)

On the Design and Characterization of Set Packing Problem on Quantum Annealers. - Marco Venere; Giuseppe Sorrentino; Beatrice Branchini; Davide Conficconi; Elisabetta Di Nitto; Donatella Sciuto; Marco D. Santambrogio (EUROCON, 2023)

A Decentralized Approach to Award Game Achievements. - Francesco Bruschi; Donatella Sciuto; Tommaso Paulon; Andrea Marchesi (PerCom Workshops, 2023)

The Hitchhiker's Guide to FPGA-Accelerated Quantum Error Correction. - Beatrice Branchini; Davide Conficconi; Donatella Sciuto; Marco D. Santambrogio (QCE, 2023)

Pushing the Level of Abstraction of Digital System Design: A Survey on How to Program FPGAs. - Emanuele Del Sozzo; Davide Conficconi; Alberto Zeni; Mirko Salaris; Donatella Sciuto; Marco D. Santambrogio (ACM Comput. Surv., 2023)

Faber: A Hardware/SoftWare Toolchain for Image Registration. - Eleonora D'Arnese; Davide Conficconi; Emanuele Del Sozzo; Luigi Fusco; Donatella Sciuto; Marco Domenico Santambrogio (IEEE Trans. Parallel Distributed Syst., 2023)

Optimizing the Use of Behavioral Locking for High-Level Synthesis. - Christian Pilato; Luca Collini; Luca Cassano; Donatella Sciuto; Siddharth Garg; Ramesh Karri (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Decentralized Updates of IoT and Edge Devices. - Francesco Bruschi; Marco Zanghieri; Michele Terziani; Donatella Sciuto (AINA (5), 2024)

An Untraceable Credential Revocation Approach Based on a Novel Merkle Tree Accumulator. - Nacereddine Sitouah; Francesco Bruschi; Francesco Lorenzo Pallotta; Riccardo Mencucci; Donatella Sciuto (ICBC, 2024)

An Accurate Union Find Decoder for Quantum Error Correction on the Toric Code. - Federico Valentino; Beatrice Branchini; Davide Conficconi; Donatella Sciuto; Marco D. Santambrogio (IPDPS (Workshops), 2024)

Towards the Acceleration of the Sparse Blossom Algorithm for Quantum Error Correction. - Marco Venere; Valentino Guerrini; Beatrice Branchini; Davide Conficconi; Donatella Sciuto; Marco D. Santambrogio (IPDPS (Workshops), 2024)

Cognitive Oracles: Provable on-chain assessment through Validity Machine Learning. - Marco Esposito; Francesco Bruschi; Manuel Montecalvo; Donatella Sciuto (PerCom Workshops, 2024)

QABE: a Framework for Quantum Annealer Programming and Benchmarking. - Gianluca Scanu; Marco Venere; Donatella Sciuto; Marco D. Santambrogio (IPDPS (Workshops), 2025)

Privacy-Preserving eIDAS Compliance in Blockchain Wallets via zkVM. - Paolo Moser; Marco Esposito; Francesco Bruschi; Donatella Sciuto (PerCom Workshops, 2025)

A Private Smart Wallet with Probabilistic Compliance. - Andrea Rizzini; Marco Esposito; Francesco Bruschi; Donatella Sciuto (CoRR, 2025)