A 90° phase-shift DLL with closed-loop DCC for high-speed mobile DRAM interface. - Dong-Hoon Jung; Kyungho Ryu; Seong-Ook Jung (IEEE Trans. Consumer Electron., 2010)

A low-power and small-area all-digital delay-locked loop with closed-loop duty-cycle correction. - Dong-Hoon Jung; Kyungho Ryu; Jung-Hyun Park; Seong-Ook Jung (ESSCIRC, 2012)

Integration of dual channel timing formatter system for high speed memory test equipment. - Jaeseok Park; Ingeol Lee; Young-Seok Park; Sung-Geun Kim; Kyungho Ryu; Dong-Hoon Jung; Kangwook Jo; Choong Keun Lee; Hongil Yoon; Seong-Ook Jung; Woo-Young Choi; Sungho Kang 001 (ISOCC, 2012)

Process Variation Tolerant All-Digital 90° Phase Shift DLL for DDR3 Interface. - Heechai Kang; Kyungho Ryu; Dong-Hoon Jung; Donghwan Lee; Won Lee; SuHo Kim; JongRyun Choi; Seong-Ook Jung (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

A DLL With Dual Edge Triggered Phase Detector for Fast Lock and Low Jitter Clock Generator. - Kyungho Ryu; Dong-Hoon Jung; Seong-Ook Jung (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

All-digital 90° phase-shift DLL with a dithering jitter suppression scheme. - Dong-Hoon Jung; Kyungho Ryu; Jung-Hyun Park; Won Lee; Seong-Ook Jung (CICC, 2013)

All-digital process-variation-calibrated timing generator for ATE with 1.95-ps resolution and a maximum 1.2-GHz test rate. - Kyungho Ryu; Dong-Hoon Jung; Seong-Ook Jung (ESSCIRC, 2013)

A 0.67nJ/S time-domain temperature sensor for low power on-chip thermal management. - Young-Jae An; Kyungho Ryu; Dong-Hoon Jung; Seung-Han Woo; Seong-Ook Jung (ICCE, 2013)

ADDLL for Clock-Deskew Buffer in High-Performance SoCs. - Jung-Hyun Park; Dong-Hoon Jung; Kyungho Ryu; Seong-Ook Jung (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Process-Variation-Calibrated Multiphase Delay Locked Loop With a Loop-Embedded Duty Cycle Corrector. - Kyungho Ryu; Dong-Hoon Jung; Seong-Ook Jung (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

All-Digital Fast-Locking Delay-Locked Loop Using a Cyclic-Locking Loop for DRAM. - Dong-Hoon Jung; Young-Jae An; Kyungho Ryu; Jung-Hyun Park; Seong-Ook Jung (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

An Energy-Efficient All-Digital Time-Domain-Based CMOS Temperature Sensor for SoC Thermal Management. - Young-Jae An; Dong-Hoon Jung; Kyungho Ryu; Seung-Han Woo; Seong-Ook Jung (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Level-Converting Retention Flip-Flop for Reducing Standby Power in ZigBee SoCs. - Jung-Hyun Park; Heechai Kang; Dong-Hoon Jung; Kyungho Ryu; Seong-Ook Jung (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Thermal and solar energy harvesting boost converter with time-multiplexing MPPT algorithm. - Dong-Hoon Jung; Ki-Ryong Kim; Seong-Ook Jung (IEICE Electron. Express, 2016)

All-Digital ON-Chip Process Sensor Using Ratioed Inverter-Based Ring Oscillator. - Young-Jae An; Dong-Hoon Jung; Kyungho Ryu; Hyuck-Sang Yim; Seong-Ook Jung (IEEE Trans. Very Large Scale Integr. Syst., 2016)

All-Digital 90° Phase-Shift DLL With Dithering Jitter Suppression Scheme. - Dong-Hoon Jung; Kyungho Ryu; Jung-Hyun Park; Seong-Ook Jung (IEEE Trans. Very Large Scale Integr. Syst., 2016)

High-Speed, Low-Power, and Highly Reliable Frequency Multiplier for DLL-Based Clock Generator. - Kyungho Ryu; Jiwan Jung; Dong-Hoon Jung; Jin Hyuk Kim; Seong-Ook Jung (IEEE Trans. Very Large Scale Integr. Syst., 2016)

GRO-TDC with gate-switch-based delay cell halving resolution limit. - Jung-Hyun Park; Dong-Hoon Jung; Seong-Ook Jung (Int. J. Circuit Theory Appl., 2017)

0.293-mm2 Fast Transient Response Hysteretic Quasi-V2 DC-DC Converter With Area-Efficient Time-Domain-Based Controller in 0.35-µm CMOS. - Dong-Hoon Jung; Ki-Ryong Kim; Sunghwan Jo; Seong-Ook Jung (IEEE J. Solid State Circuits, 2018)

All-Digital Process-Variation-Calibrated Timing Generator for ATE With 1.95-ps Resolution and Maximum 1.2-GHz Test Rate. - Dong-Hoon Jung; Kyungho Ryu; Jung-Hyun Park; Seong-Ook Jung (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Lessons Learned from an Auditory-vibrotactile Sensory Experience in the Museum. - Dong-Hoon Jung; Jieun Kim; Jeong-Gu Lee; Hoi Jeong Yang; Hokyoung Ryu (ISS, 2019)

29.6 A Distributed Digital LDO with Time-Multiplexing Calibration Loop Achieving 40A/mm2 Current Density and 1mA-to-6.4A Ultra-Wide Load Range in 5nm FinFET CMOS. - Dong-Hoon Jung; Tae-Hwang Kong; Jun-Hyeok Yang; SangHo Kim; Kwangho Kim; Jeongpyo Park; Michael Choi; Jongshin Shin (ISSCC, 2021)

A Study on Design Method of Synchronous Reluctance Motor Based on Nonlinear MEC Using Newton-Raphson Method. - Dong-Hoon Jung; Ki-Deok Lee; Jae-Kwang Lee (IEEE Access, 2023)

A Study on the Control Method of 6-DOF Magnetic Levitation System Using Non-Contact Position Sensors. - Dong-Hoon Jung; Jong Suk Lim (Sensors, 2023)

14.6 A 10A Computational Digital LDO Achieving 263A/mm2 Current Density with Distributed Power-Gating Switches and Time-Based Fast-Transient Controller for Mobile SoC Application in 3nm GAAFET. - Dongha Lee 004; Seki Kim; Takahiro Nomiyama; Dong-Hoon Jung; Dongsu Kim; Jongwoo Lee; Sungung Kwak (ISSCC, 2024)

8.4 A 4GHz, 0.69%-Accuracy Voltage-Droop Detector with Multiple Remote Sensing and Under 2-Cycle Detection Latency in 2nm GAAFET. - Dong-Hoon Jung; Dongha Lee 004; Seki Kim; Susie Kim; Min Young Kang; Takahiro Nomiyama; Dongsu Kim; Jongwoo Lee (ISSCC, 2025)

Design of Coil Patterns for an Axial Flux Permanent Magnet Synchronous Motor With PCB Stator. - Dong-Woo Nam; Min-Ki Hong; Na-Rim Jo; Dong-Hoon Jung; Won-Ho Kim (IEEE Access, 2025)