Ultra low power and high speed FPGA design with CNFET. - Kwang-Soo Han; Dong-Ik Jeon; Ki-Seok Chung (ISCIT, 2012)

Novel level-up shifters for high performance and low power mobile devices. - Dong-Ik Jeon; Kwang-Soo Han; Ki-Seok Chung (ICCE, 2013)

Analysis of various DRAM devices from power consumption's perspective. - Dong-Ik Jeon; Min-Kyu Lee; Ki-Seok Chung (NAS, 2015)

CasHMC: A Cycle-Accurate Simulator for Hybrid Memory Cube. - Dong-Ik Jeon; Ki-Seok Chung (IEEE Comput. Archit. Lett., 2017)

HMC-MAC: Processing-in Memory Architecture for Multiply-Accumulate Operations with Hybrid Memory Cube. - Dong-Ik Jeon; Kyeong-Bin Park; Ki-Seok Chung (IEEE Comput. Archit. Lett., 2018)

Runtime Memory Controller Profiling with Performance Analysis for DRAM Memory Controllers. - Dong-Ik Jeon; Min-Kyu Lee; Ji-Chan Kim; Ki-Seok Chung (J. Circuits Syst. Comput., 2018)