A 0.6 V 12 b 10 MS/s Low-Noise Asynchronous SAR-Assisted Time-Interleaved SAR (SATI-SAR) ADC. - Wan Kim; Hyeok-Ki Hong; Yi-Ju Roh; Hyun-Wook Kang; Sun-Il Hwang; Dong-Shin Jo; Dong-Jin Chang; Min-Jae Seo; Seung-Tak Ryu (IEEE J. Solid State Circuits, 2016)

Normalized-Full-Scale-Referencing Digital-Domain Linearity Calibration for SAR ADC. - Dong-Jin Chang; Wan Kim; Min-Jae Seo; Hyeok-Ki Hong; Seung-Tak Ryu (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

A 65 nm 0.08-to-680 MHz Low-Power Synthesizable MDLL With Nested-Delay Cell and Background Static Phase Offset Calibration. - Dong-Jin Chang; Min-Jae Seo; Hyeok-Ki Hong; Seung-Tak Ryu (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

A Reusable Code-Based SAR ADC Design With CDAC Compiler and Synthesizable Analog Building Blocks. - Min-Jae Seo; Yi-Ju Roh; Dong-Jin Chang; Wan Kim; Ye-Dam Kim; Seung-Tak Ryu (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

A Single-Supply Buffer-Embedding SAR ADC with Skip-Reset having Inherent Chopping Capability. - Min-Jae Seo; Dong-Hwan Jin; Ye-Dam Kim; Jong-Pal Kim; Dong-Jin Chang; Won-Mook Lim; Jae-Hyun Chung; Chang-Un Park; Eun-Ji An; Seung-Tak Ryu (A-SSCC, 2019)

A 65-nm CMOS 6-bit 2.5-GS/s 7.5-mW 8 $ times$ Time-Domain Interpolating Flash ADC With Sequential Slope-Matching Offset Calibration. - Dong-Ryeol Oh; Jong-In Kim; Dong-Shin Jo; Woo-Chul Kim; Dong-Jin Chang; Seung-Tak Ryu (IEEE J. Solid State Circuits, 2019)

Compact Mixed-Signal Convolutional Neural Network Using a Single Modular Neuron. - Dong-Jin Chang; Byeong-Gyu Nam; Seung-Tak Ryu (IEEE Trans. Circuits Syst., 2020)

A 40-nm CMOS 12b 120-MS/s Nonbinary SAR-Assisted SAR ADC With Double Clock-Rate Coarse Decision. - Yi-Ju Roh; Dong-Jin Chang; Seung-Tak Ryu (IEEE Trans. Circuits Syst., 2020)

A 4th-order CT I-DSM with Digital Noise Coupling and Input Pre-conversion Method for Initialization. - Ye-Dam Kim; Jae-Hyun Chung; Kent Edrian Lozada; Dong-Jin Chang; Seung-Tak Ryu (A-SSCC, 2021)

An Input-buffer Embedding Dual-residue Pipelined-SAR ADC with Nonbinary Capacitive Interpolation. - Seung-Yong Lim; Raymond Mabilangan; Dong-Jin Chang; Young-Jae Cho; Michael Choi; Seung-Tak Ryu (A-SSCC, 2021)

Sequential Lung Nodule Synthesis Using Attribute-Guided Generative Adversarial Networks. - Sungho Suh; Sojeong Cheon; Dong-Jin Chang; Deukhee Lee; Yong Oh Lee (MICCAI (6), 2021)

MixedNet: Network Design Strategies for Cost-Effective Quantized CNNs. - Dong-Jin Chang; Byeong-Gyu Nam; Seung-Tak Ryu (IEEE Access, 2021)

Semi-AI and Full-AI digitizer: The ways to digitalize visual field big data. - Tong Min Kim; Wonseo Choi; In-Young Choi; Sang Jun Park; Kun-Ho Yoon; Dong-Jin Chang (Comput. Methods Programs Biomed., 2021)

A 28-nm 10-b 2.2-GS/s 18.2-mW Relative-Prime Time-Interleaved Sub-Ranging SAR ADC With On-Chip Background Skew Calibration. - Dong-Jin Chang; Michael Choi; Seung-Tak Ryu (IEEE J. Solid State Circuits, 2021)

An innovative strategy for standardized, structured, and interoperable results in ophthalmic examinations. - Yongseok Mun; Jooyoung Kim; Kyoung Jin Noh; Soochahn Lee; Seok Kim; Soyoung Yi; Kyu Hyung Park; Sooyoung Yoo; Dong-Jin Chang; Sang Jun Park (BMC Medical Informatics Decis. Mak., 2021)

A Relative-Prime Rotation Based Fully On-Chip Background Skew Calibration for Time-Interleaved ADCs. - Dong-Jin Chang; Seung-Tak Ryu (VLSI Technology and Circuits, 2022)

Supervised segmentation with domain adaptation for small sampled orbital CT images. - Sungho Suh; Sojeong Cheon; Wonseo Choi; Yeon Woong Chung; Won-Kyung Cho; Ji-Sun Paik; Sung Eun Kim; Dong-Jin Chang; Yong Oh Lee (J. Comput. Des. Eng., 2022)

Retrieval Augmented Large Language Model System for Comprehensive Drug Contraindications. - Byeonghun Bang; Jongsuk Yoon; Dong-Jin Chang; Seho Park; Yong Oh Lee (CoRR, 2025)