An experimental 16-Mbit DRAM with reduced peak-current noise. - Daeje Chin; Changhyun Kim; Yunho Choi; Dong-Sun Min; Hong-Sun Hwang; Hoon Choi; Soo-In Cho; Tae-Young Chung; Chan J. Park; Yunseung Shin; Kwang Pyuk Suh; Yong E. Park (IEEE J. Solid State Circuits, 1989)

Temperature-compensation circuit techniques for high-density CMOS DRAMs. - Dong-Sun Min; Soo-In Cho; Dong Soo Jun; Dong-Jae Lee; Yongsik Seok; Daeje Chin (IEEE J. Solid State Circuits, 1992)

Multiple twisted data line techniques for coupling noise reduction in embedded DRAMs. - Dong-Sun Min; Dietrich W. Langer (CICC, 1999)

Multiple twisted dataline techniques for multigigabit DRAMs. - Dong-Sun Min; Dietrich W. Langer (IEEE J. Solid State Circuits, 1999)