A 5-156.25Gb/s high pin efficiency Receiver Based on CNRZ-5 for USR High-Speed Interface. - Geng Zhang 001; Fangxu Lv; Zhengbin Pang; Heming Wang; Dongbin Lv; Tao Liu; Jinwang Zhang (ASICON, 2021)

A CNRZ-7 Based Wireline Transceiver With High-Bandwidth-Density, Low-Power for D2D Communication. - Geng Zhang 001; Mingche Lai; Fangxu Lyu; Xuqiang Zheng; Heming Wang; Dongbin Lv; Chaolong Xu; Xingyun Qi; Qing Liu (IEEE Access, 2022)

A 33.33 Gb/s/wire pin-efficient 1.06 pJ/bit wireline transceiver based on CNRZ-5 for Chiplet in 28 nm CMOS. - Mingche Lai; Geng Zhang 001; Fangxu Lv; Xuqiang Zheng; Heming Wang; Dongbin Lv; Chaolong Xu; Xingyun Qi (Microelectron. J., 2022)

Low-Jitter Retimer Circuits for High-Performance Computer Optical Communications. - Qing Liu; Heming Wang; Fangxu Lv; Geng Zhang 001; Dongbin Lv (ICCEIC, 2023)