A novel decimal-to-decimal logarithmic converter. - Dongdong Chen 002; Younhee Choi; Li Chen; Daniel Teng; Khan A. Wahid; Seok-Bum Ko (ISCAS, 2008)

A 32-bit Decimal Floating-Point Logarithmic Converter. - Dongdong Chen 002; Yu Zhang; Younhee Choi; Moon Ho Lee; Seok-Bum Ko (IEEE Symposium on Computer Arithmetic, 2009)

A New Decimal Antilogarithmic Converter. - Dongdong Chen 002; Yu Zhang; Daniel Teng; Khan A. Wahid; Moon Ho Lee; Seok-Bum Ko (ISCAS, 2009)

A high performance pseudo-multi-core ECC processor over GF(2163). - Yu Zhang; Dongdong Chen 002; Younhee Choi; Li Chen; Seok-Bum Ko (ISCAS, 2010)

A high performance ECC hardware implementation with instruction-level parallelism over GF(2163). - Yu Zhang; Dongdong Chen 002; Younhee Choi; Li Chen; Seok-Bum Ko (Microprocess. Microsystems, 2010)

Nonspeculative decimal signed digit adder. - Liu Han; Dongdong Chen 002; Khan A. Wahid; Seok-Bum Ko (ISCAS, 2011)

A Novel Decimal Logarithmic Converter Based on First-Order Polynomial Approximation. - Dongdong Chen 002; Seok-Bum Ko (Circuits Syst. Signal Process., 2012)

Decimal floating-point antilogarithmic converter based on selection by rounding: algorithm and architecture. - Dongdong Chen 002; Liu Han; Seok-Bum Ko (IET Comput. Digit. Tech., 2012)

A dynamic non-uniform segmentation method for first-order polynomial function evaluation. - Dongdong Chen 002; Seok-Bum Ko (Microprocess. Microsystems, 2012)

Improved Decimal Floating-Point Logarithmic Converter Based on Selection by Rounding. - Dongdong Chen 002; Liu Han; Younhee Choi; Seok-Bum Ko (IEEE Trans. Computers, 2012)

Area- and power-efficient iterative single/double-precision merged floating-point multiplier on FPGA. - Hao Zhang 041; Dongdong Chen 002; Seok-Bum Ko (IET Comput. Digit. Tech., 2017)

High performance and energy efficient single-precision and double-precision merged floating-point adder on FPGA. - Hao Zhang 041; Dongdong Chen 002; Seok-Bum Ko (IET Comput. Digit. Tech., 2018)

Efficient Multiple-Precision Floating-Point Fused Multiply-Add with Mixed-Precision Support. - Hao Zhang 041; Dongdong Chen 002; Seok-Bum Ko (IEEE Trans. Computers, 2019)

New Flexible Multiple-Precision Multiply-Accumulate Unit for Deep Neural Network Training and Inference. - Hao Zhang 041; Dongdong Chen 002; Seok-Bum Ko (IEEE Trans. Computers, 2020)