A low-power SerDes for high-speed on-chip networks. - Dongjun Park; Junsub Yoon; Jongsun Kim (ISOCC, 2017)

A 0.15 to 2.2 GHz all-digital delay-locked loop. - Dongjun Park; Geontae Park; Jongsun Kim (NEWCAS, 2017)

A 7-GHz Fast-Lock 2-Step TDC-based All-Digital DLL for Post-DDR4 SDRAMs. - Dongjun Park; Jongsun Kim (ISCAS, 2018)

Single Trace Attack on Key Reconciliation Process for Quantum Key Distribution. - Dongjun Park; Donghoe Heo; Suhri Kim; Seokhie Hong (ICTC, 2020)

A 7-GHz Fast-Lock Two-Step Time-to-Digital Converter-Based All-Digital DLL. - Dongjun Park; Jongsun Kim (Circuits Syst. Signal Process., 2020)

A low-jitter 2.4 GHz all-digital MDLL with a dithering jitter reduction scheme for 256 times frequency multiplication. - Dongjun Park; Jongsun Kim (IEICE Electron. Express, 2020)

Side Channel Vulnerability in Parity Computation of Generic Key Reconciliation Process on QKD. - GyuSang Kim; Dongjun Park; HeeSeok Kim; Seokhie Hong (ICTC, 2021)

Workspace Derivation of Arthroscope Using Morphological Data and Standard Portal Placement Method for Shoulder Arthroscopy. - Chang-Kyun Kim; Joonhwan Kim; Dongjun Park; Dong-Soo Kwon (IEEE Access, 2021)

Structured Pattern Pruning Using Regularization. - Dongjun Park; Geung-Hee Lee (CoRR, 2021)

Single trace side-channel attack on key reconciliation in quantum key distribution system and its efficient countermeasures. - Dongjun Park; GyuSang Kim; Donghoe Heo; Suhri Kim; HeeSeok Kim; Seokhie Hong (ICT Express, 2021)

Autoscaled-Wavelet Convolutional Layer for Deep Learning-Based Side-Channel Analysis. - Daehyeon Bae; Dongjun Park; GyuSang Kim; Minsig Choi; Nayeon Lee; Heeseok Kim; Seokhie Hong (IEEE Access, 2023)

Stealing Keys From Hardware Wallets: A Single Trace Side-Channel Attack on Elliptic Curve Scalar Multiplication Without Profiling. - Dongjun Park; Minsig Choi; GyuSang Kim; Daehyeon Bae; Heeseok Kim; Seokhie Hong (IEEE Access, 2023)

REAF: Replacing Exponential Activation Function to Prevent Side-Channel Analysis. - Joonsup Kim; Dongjun Park; GyuSang Kim; Sujin Park; Daehyeon Bae; Heeseok Kim; Seokhie Hong (ICISC, 2024)

A $94 text{fs}_{ text{rms}}$-Jitter and -249.3dB FoM 4.0GHz Ring-Oscillator-Based MDLL with Background Calibration of Phase Offset and Injection Slope Mismatch. - Dongjun Park; Heesung Roh; Seon-Kyoo Lee; Jae-Yoon Sim (VLSI Technology and Circuits, 2024)

Cloning Hardware Wallet Without Valid Credentials Through Side-Channel Analysis of Hash Function. - Dongjun Park; Joonsup Kim; HeeSeok Kim; Seokhie Hong (IEEE Access, 2024)