Design and analysis of an NoC architecture from performance, reliability and energy perspective. - Jongman Kim; Dongkook Park; Chrysostomos Nicopoulos; Narayanan Vijaykrishnan; Chita R. Das (ANCS, 2005)

A low latency router supporting adaptivity for on-chip interconnects. - Jongman Kim; Dongkook Park; Theo Theocharides; Narayanan Vijaykrishnan; Chita R. Das (DAC, 2005)

Exploring Fault-Tolerant Network-on-Chip Architectures. - Dongkook Park; Chrysostomos Nicopoulos; Jongman Kim; Narayanan Vijaykrishnan; Chita R. Das (DSN, 2006)

A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks. - Jongman Kim; Chrysostomos Nicopoulos; Dongkook Park; Vijaykrishnan Narayanan; Mazin S. Yousif; Chita R. Das (ISCA, 2006)

ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers. - Chrysostomos Nicopoulos; Dongkook Park; Jongman Kim; Narayanan Vijaykrishnan; Mazin S. Yousif; Chita R. Das (MICRO, 2006)

A Distributed Multi-Point Network Interface for Low-Latency, Deadlock-Free On-Chip Interconnects. - Dongkook Park; Chrysostomos Nicopoulos; Jongman Kim; Narayanan Vijaykrishnan; Chita R. Das (Nano-Net, 2006)

A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks. - Thomas D. Richardson; Chrysostomos Nicopoulos; Dongkook Park; Narayanan Vijaykrishnan; Yuan Xie 001; Chita R. Das; Vijay Degalahal (VLSI Design, 2006)

Design of a Dynamic Priority-Based Fast Path Architecture for On-Chip Interconnects. - Dongkook Park; Reetuparna Das; Chrysostomos Nicopoulos; Jongman Kim; Narayanan Vijaykrishnan; Ravishankar R. Iyer 001; Chita R. Das (Hot Interconnects, 2007)

A novel dimensionally-decomposed router for on-chip communication in 3D architectures. - Jongman Kim; Chrysostomos Nicopoulos; Dongkook Park; Reetuparna Das; Yuan Xie 001; Narayanan Vijaykrishnan; Mazin S. Yousif; Chita R. Das (ISCA, 2007)

Performance and power optimization through data compression in Network-on-Chip architectures. - Reetuparna Das; Asit K. Mishra; Chrysostomos Nicopoulos; Dongkook Park; Vijaykrishnan Narayanan; Ravishankar R. Iyer 001; Mazin S. Yousif; Chita R. Das (HPCA, 2008)

MIRA: A Multi-layered On-Chip Interconnect Router Architecture. - Dongkook Park; Soumya Eachempati; Reetuparna Das; Asit K. Mishra; Yuan Xie 001; Narayanan Vijaykrishnan; Chita R. Das (ISCA, 2008)

FPGA-based prototyping of a 2D MESH / TORUS on-chip interconnect (abstract only). - Donglai Dai; Aniruddha S. Vaidya; Roy Saharoy; Seungjoon Park; Dongkook Park; Hariharan L. Thantry; Ralf Plate; Elmar Maas; Akhilesh Kumar; Mani Azimi (FPGA, 2010)

On the Effects of Process Variation in Network-on-Chip Architectures. - Chrysostomos Nicopoulos; Suresh Srinivasan; Aditya Yanamandra; Dongkook Park; Vijaykrishnan Narayanan; Chita R. Das; Mary Jane Irwin (IEEE Trans. Dependable Secur. Comput., 2010)

MoDe-X: Microarchitecture of a Layout-Aware Modular Decoupled Crossbar for On-Chip Interconnects. - Dongkook Park; Aniruddha S. Vaidya; Akhilesh Kumar; Mani Azimi (IEEE Trans. Computers, 2014)