Optimization of high-speed CMOS logic circuits with analytical models for signal delay, chip area, and dynamic power dissipation. - Bernhard Hoppe; Gerd Neuendorf; Doris Schmitt-Landsiedel; J. Will Specks (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990)

Pipelined architecture for fast CMOS buffer RAMs. - Doris Schmitt-Landsiedel; Bernhard Hoppe; Gerd Neuendorf; Maria Wurm; Josef Winnerl (IEEE J. Solid State Circuits, 1990)

Optimization and architectural evaluation of regular combinatoric structures. - Veronika Eisele; Doris Schmitt-Landsiedel (Microprocessing and Microprogramming, 1991)

Block-decoded sense-amplifier driver for high-speed sensing in DRAM's. - Heribert Geib; Wolfgang Raab; Doris Schmitt-Landsiedel (IEEE J. Solid State Circuits, 1992)

AFFCCA: a tool for critical area analysis with circular defects and lithography deformed layout. - Igor Bubel; Wojciech Maly; Thomas Waas; Pranab K. Nag; Hans Hartmann; Doris Schmitt-Landsiedel; Susanne Griep (DFT, 1995)

A new algorithm for the design of stable higher order single loop sigma delta analog-to-digital converters. - S. R. Kadivar; Doris Schmitt-Landsiedel; Heinrich Klar (ICCAD, 1995)

The impact of intra-die device parameter variations on path delays and on the design for yield of low voltage digital circuits. - M. Eisele; Jörg Berthold; Doris Schmitt-Landsiedel; R. Mahnkopf (IEEE Trans. Very Large Scale Integr. Syst., 1997)

A low-voltage MOSFET-only Sigma-Delta modulator for speech band applications using depletion-mode MOS-capacitors in combined series and parallel compensation. - Thomas Tille; Jens Sauerbrey; Doris Schmitt-Landsiedel (ISCAS (1), 2001)

A 1.8-V MOSFET-only ΣΔ modulator using substrate biased depletion-mode MOS capacitors in series compensation. - Thomas Tille; Jens Sauerbrey; Doris Schmitt-Landsiedel (IEEE J. Solid State Circuits, 2001)

Analysis and compensation of the bitline multiplexer in SRAM current sense amplifiers. - Bernhard Wicht; Steffen Paul; Doris Schmitt-Landsiedel (IEEE J. Solid State Circuits, 2001)

A 0.7-V MOSFET-only switched-opamp ΣΔ modulator in standard digital CMOS technology. - Jens Sauerbrey; Thomas Tille; Doris Schmitt-Landsiedel; Roland Thewes (IEEE J. Solid State Circuits, 2002)

Reliability analysis of power MOSFET's with the help of compact models and circuit simulation. - Alberto Castellazzi; R. Kraus; Norbert Seliger; Doris Schmitt-Landsiedel (Microelectron. Reliab., 2002)

An ultra low-power adiabatic adder embedded in a standard 0.13μm CMOS environment. - Ettore Amirante; Jürgen Fischer; Markus Lang; Agnese Bargagli-Stoffi; Jörg Berthold; Christoph Heer; Doris Schmitt-Landsiedel (ESSCIRC, 2003)

A yield-optimized latch-type SRAM sense amplifier. - Bernhard Wicht; Thomas Nirschl; Doris Schmitt-Landsiedel (ESSCIRC, 2003)

Automatic worst case pattern generation using neural networks & genetic algorithm for estimation of switching noise on power supply lines in CMOS circuits. - Eric Liau; Doris Schmitt-Landsiedel (ETW, 2003)

Design of an integrated potentiostat circuit for CMOS bio sensor chips. - Alexander Frey; Martin Jenkner; Meinrad Schienle; Christian Paulus; Birgit Holzapfl; Petra Schindler-Bauer; Franz Hofmann; Dirk Kuhlmeier; Jürgen Krause; Jörg Albers; Walter Gumbrecht; Doris Schmitt-Landsiedel; et al. (ISCAS (5), 2003)

0.65V sigma-delta modulators. - Jens Sauerbrey; Martin Wittig; Doris Schmitt-Landsiedel; Roland Thewes (ISCAS (1), 2003)

Reduction of the Energy Consumption in Adiabatic Gates by Optimal Transistor Sizing. - Jürgen Fischer; Ettore Amirante; Francesco Randazzo; Giuseppe Iannaccone; Doris Schmitt-Landsiedel (PATMOS, 2003)

Evolution of automatic semiconductor test equipment: automatic test pattern learning, classification, optimisation and generation for power supply noise. - Eric Liau; Doris Schmitt-Landsiedel (VECIMS, 2003)

Design Aspects and Technological Scaling Limits of ZigZag Circuit Block Switch-Off Schemes. - Stephan Henzler; Markus Koban; Doris Schmitt-Landsiedel; Jörg Berthold; Georg Georgakos (VLSI-SOC, 2003)

Impact of Gate Leakage on Efficiency of Circuit Block Switch-Off Schemes. - Stephan Henzler; Philip Teichmann; Markus Koban; Jörg Berthold; Georg Georgakos; Doris Schmitt-Landsiedel (VLSI-SoC (Selected Papers), 2003)

A 128 × 128 CMOS biosensor array for extracellular recording of neural activity. - Björn Eversmann; Martin Jenkner; Franz Hofmann; Christian Paulus; Ralf Brederlow; Birgit Holzapfl; Peter Fromherz; Matthias Merz; Markus Brenner; Matthias Schreiter; Reinhard Gabl; Kurt Plehnert; et al. (IEEE J. Solid State Circuits, 2003)

A 0.5-V 1-μW successive approximation ADC. - Jens Sauerbrey; Doris Schmitt-Landsiedel; Roland Thewes (IEEE J. Solid State Circuits, 2003)

Hot-Spot Meaurements and Analysis of Electro-Thermal Effects in Low-Voltage Power-MOSFET's. - Alberto Castellazzi; V. Kartal; R. Kraus; Norbert Seliger; Martin Honsberg-Riedl; Doris Schmitt-Landsiedel (Microelectron. Reliab., 2003)

The tunnelling field effect transistors (TFET): the temperature dependence, the simulation model, and its application. - Thomas Nirschl; Peng-Fei Wang; Walter Hansch; Doris Schmitt-Landsiedel (ISCAS (3), 2004)

Power Supply Net for Adiabatic Circuits. - Jürgen Fischer; Ettore Amirante; Agnese Bargagli-Stoffi; Philip Teichmann; Dominik Gruber; Doris Schmitt-Landsiedel (PATMOS, 2004)

Single Supply Voltage High-Speed Semi-dynamic Level-Converting Flip-Flop with Low Power and Area Consumption. - Stephan Henzler; Georg Georgakos; Jörg Berthold; Doris Schmitt-Landsiedel (PATMOS, 2004)

Two Level Compact Simulation Methodology for Timing Analysis of Power-Switched Circuits. - Stephan Henzler; Georg Georgakos; Jörg Berthold; Doris Schmitt-Landsiedel (PATMOS, 2004)

Yield and speed optimization of a latch-type voltage sense amplifier. - Bernhard Wicht; Thomas Nirschl; Doris Schmitt-Landsiedel (IEEE J. Solid State Circuits, 2004)

Analysis of PowerMOSFET chips failed in thermal instability. - Alberto Castellazzi; H. Schwarzbauer; Doris Schmitt-Landsiedel (Microelectron. Reliab., 2004)

Design of low-voltage MOSFET-only ΣΔ modulators in standard digital CMOS technology. - Thomas Tille; Jens Sauerbrey; Manfred Mauthe; Doris Schmitt-Landsiedel (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

Scaling trends in adiabatic logic. - Jürgen Fischer; Philip Teichmann; Doris Schmitt-Landsiedel (Conf. Computing Frontiers, 2005)

Making adiabatic circuits attractive for todays VLSI industry by multi-mode operation-adiabatic mode circuits. - Stephan Henzler; Thomas Nirschl; Matthias Eireiner; Ettore Amirante; Doris Schmitt-Landsiedel (Conf. Computing Frontiers, 2005)

Computational Intelligence Characterization Method of Semiconductor Device. - Eric Liau; Doris Schmitt-Landsiedel (DATE, 2005)

Impact of process parameter variations on the energy dissipation in adiabatic logic. - Jürgen Fischer; Ettore Amirante; Thomas Nirschl; Philip Teichmann; Stephan Henzler; Doris Schmitt-Landsiedel (ECCTD, 2005)

A 0.6V 100dB 5.2MHz transconductance amplifier realized in a multi-VT process. - Agnese Bargagli-Stoffi; Jens Sauerbrey; Roland Thewes; Doris Schmitt-Landsiedel (ESSCIRC, 2005)

Dynamic state-retention flip flop for fine-grained sleep-transistor scheme. - Stephan Henzler; Thomas Nirschi; Christian Pacha; Peter Spindler; Philip Teichmann; Michael Fulde; Jürgen Fischer; Matthias Eireiner; Thomas Fischer; Georg Georgakos; Jörg Berthold; Doris Schmitt-Landsiedel (ESSCIRC, 2005)

Energieoptimierung durch Adiabatische Schaltungstechnik. - Jürgen Fischer; Philip Teichmann; Ettore Amirante; Doris Schmitt-Landsiedel (GI Jahrestagung (1), 2005)

CMOS sensor array for electrical imaging of neuronal activity. - Björn Eversmann; Martin Jenkner; Franz Hofmann; Christian Paulus; Birgit Holzapfl; Roland Thewes; Doris Schmitt-Landsiedel; Armin Lambacher; Alexander Kaul; Ralf Zeitler; Matthias Merz; Alexander Kunze; et al. (ISCAS (4), 2005)

Computational intelligence based testing for semiconductor measurement systems. - Eric Liau; Doris Schmitt-Landsiedel (ITC, 2005)

Power-Clock Gating in Adiabatic Logic Circuits. - Philip Teichmann; Jürgen Fischer; Stephan Henzler; Ettore Amirante; Doris Schmitt-Landsiedel (PATMOS, 2005)

High abstraction level permutational ESD concept analysis. - Martin Streibl; Franz Zängl; Kai Esmark; Robert Schwencker; Wolfgang Stadler; Harald Gossner; S. Drüen; Doris Schmitt-Landsiedel (Microelectron. Reliab., 2005)

A 24x16 CMOS-Based Chronocoulometric DNA Microarray. - Marcin K. Augustyniak; Christian Paulus; Ralf Brederlow; N. Persike; Gerhard Hartwich; Doris Schmitt-Landsiedel; Roland Thewes (ISSCC, 2006)

A 90nm CMOS low-power GSM/EDGE multimedia-enhanced baseband processor with 380MHz ARM9 and mixed-signal extensions. - Thomas Lüftner; Jörg Berthold; Christian Pacha; Georg Georgakos; Guillaume Sauzon; Olaf Hömke; Jurij Beshenar; Peter Mahrla; Knut M. Just; Peter Hober; Stephan Henzler; Doris Schmitt-Landsiedel; et al. (ISSCC, 2006)

Pattern Pruner: Automatic Pattern Size Reduction Method that Uses Computational Intelligence-Based Testing. - Eric Liau Chee Hong; Manfred Menke; Thomas Janik; Doris Schmitt-Landsiedel (ITC, 2006)

Dynamic state-retention flip-flop for fine-grained power gating with small design and power overhead. - Stephan Henzler; Georg Georgakos; Matthias Eireiner; Thomas Nirschl; Christian Pacha; Jörg Berthold; Doris Schmitt-Landsiedel (IEEE J. Solid State Circuits, 2006)

Layout options for stability tuning of SRAM cells in multi-gate-FET technologies. - Florian Bauer; Klaus von Arnim; Christian Pacha; Thomas Schulz; Michael Fulde; Axel Nackaerts; M. Jurczak; Wade Xiong; K. T. San; C. Rinn Cleavelin; Klaus Schruefer; Georg Georgakos; et al. (ESSCIRC, 2007)

Performance improvement of embedded low-power microprocessor cores by selective flip flop replacement. - Thomas Baumann; Jörg Berthold; T. Niedermeier; Tim Schoenauer; J. Dienstuhl; Doris Schmitt-Landsiedel; Christian Pacha (ESSCIRC, 2007)

Analog design challenges and trade-offs using emerging materials and devices. - Michael Fulde; Abdelkarim Mercha; Cedric Gustin; Bertrand Parvais; Vaidyanathan Subramanian; Klaus von Arnim; Florian Bauer; Klaus Schruefer; Doris Schmitt-Landsiedel; Gerhard Knoblinger (ESSCIRC, 2007)

Variation tolerant high resolution and low latency time-to-digital converter. - Stephan Henzler; Siegmar Koeppe; Dominik Lorenz; Winfried Kamp; Ronald Kuenemund; Doris Schmitt-Landsiedel (ESSCIRC, 2007)

A configurable High-Side/ low-Side Driver. - Michael Wendt; Lenz Thoma; Bernhard Wicht; Doris Schmitt-Landsiedel (ESSCIRC, 2007)

Advances in Multi-Gate MOSFET Circuit Design. - Michael Fulde; Klaus von Arnim; Christian Pacha; Florian Bauer; Christian Russ; Domagoj Siprak; Wade Xiong; Andrew Marshall; C. Rinn Cleavelin; Klaus Schruefer; Doris Schmitt-Landsiedel; Gerhard Knoblinger (ICECS, 2007)

Transient Variations in Emerging SOI Technologies: Modeling and Impact on Analog/Mixed-Signal Circuits. - Michael Fulde; Doris Schmitt-Landsiedel; Gerhard Knoblinger (ISCAS, 2007)

An Integrated Gravimetric FBAR Circuit for Operation in Liquids Using a Flip-Chip Extended 0.13μm CMOS Technology. - Marcin K. Augustyniak; W. Weber; Gottfried Beer; Hans Mulatz; L. Elbrecht; H.-J. Timme; Marc Tiebout; Werner Simbürger; Christian Paulus; Björn Eversmann; Doris Schmitt-Landsiedel; Roland Thewes; et al. (ISSCC, 2007)

A 10GHz Broadband Amplifier with Bootstrapped 2kV ESD Protection. - Wolfgang Soldner; Moon-Jung Kim; Martin Streibl; Harald Gossner; Thomas H. Lee; Doris Schmitt-Landsiedel (ISSCC, 2007)

In-Situ Delay Characterization and Local Supply Voltage Adjustment for Compensation of Local Parametric Variations. - Matthias Eireiner; Stephan Henzler; Georg Georgakos; Jörg Berthold; Doris Schmitt-Landsiedel (IEEE J. Solid State Circuits, 2007)

A Complementary Switched MOSFET Architecture for the 1/f Noise Reduction in Linear Analog CMOS ICs. - Jeongwook Koh; Doris Schmitt-Landsiedel; Roland Thewes; Ralf Brederlow (IEEE J. Solid State Circuits, 2007)

A 90-nm CMOS Low-Power GSM/EDGE Multimedia-Enhanced Baseband Processor With 380-MHz ARM926 Core and Mixed-Signal Extensions. - Thomas Lüftner; Jörg Berthold; Christian Pacha; Georg Georgakos; Guillaume Sauzon; Olaf Hömke; Jurij Beshenar; Peter Mahrla; Knut M. Just; Peter Hober; Stephan Henzler; Doris Schmitt-Landsiedel; et al. (IEEE J. Solid State Circuits, 2007)

RF ESD protection strategies: Codesign vs. low-C protection. - Wolfgang Soldner; Martin Streibl; U. Hodel; Marc Tiebout; Harald Gossner; Doris Schmitt-Landsiedel; Jung-Hoon Chun; Choshu Ito; Robert W. Dutton (Microelectron. Reliab., 2007)

90nm 4.7ps-Resolution 0.7-LSB Single-Shot Precision and 19pJ-per-Shot Local Passive Interpolation Time-to-Digital Converter with On-Chip Characterization. - Stephan Henzler; Siegmar Koeppe; Winfried Kamp; Hans Mulatz; Doris Schmitt-Landsiedel (ISSCC, 2008)

Efficient High-Speed Interface Verification and Fault Analysis. - Thomas Nirmaier; Jose Torres Zaguirre; Eric Liau; Wolfgang Spirkl; Armin Rettenberger; Doris Schmitt-Landsiedel (ITC, 2008)

A Design Space Comparison of 6T and 8T SRAM Core-Cells. - Florian Bauer; Georg Georgakos; Doris Schmitt-Landsiedel (PATMOS, 2008)

Latched CMOS DRAM Sense Amplifier Yield Analysis and Optimization. - Yan Li 030; Helmut Schneider; Florian Schnabel 002; Roland Thewes; Doris Schmitt-Landsiedel (PATMOS, 2008)

A Local Passive Time Interpolation Concept for Variation-Tolerant High-Resolution Time-to-Digital Conversion. - Stephan Henzler; Siegmar Koeppe; Dominik Lorenz; Winfried Kamp; Ronald Kuenemund; Doris Schmitt-Landsiedel (IEEE J. Solid State Circuits, 2008)

A Configurable High-Side/Low-Side Driver With Fast and Equalized Switching Delay. - Michael Wendt; Lenz Thoma; Bernhard Wicht; Doris Schmitt-Landsiedel (IEEE J. Solid State Circuits, 2008)

Architectural assessment of design techniques to improve speed and robustness in embedded microprocessors. - Thomas Baumann; Doris Schmitt-Landsiedel; Christian Pacha (DAC, 2009)

Fast stability analysis of large-scale SRAM arrays and the impact of NBTI degradation. - Stefan Drapatz; Thomas Fischer; Karl Hofmann; Ettore Amirante; Peter Huber; Martin Ostermayr; Georg Georgakos; Doris Schmitt-Landsiedel (ESSCIRC, 2009)

Design of Low-Voltage Bandgap Reference Circuits in Multi-Gate CMOS Technologies. - Michael Fulde; Martin Wirnshofer; Gerhard Knoblinger; Doris Schmitt-Landsiedel (ISCAS, 2009)

A Robust Synchronized 2N2P LC Oscillator with a Shut-down Mode for Adiabatic Logic Circuits. - Philip Teichmann; Jürgen Fischer; Doris Schmitt-Landsiedel (ISCAS, 2009)

Adder Circuits with Transistors using Independently Controlled Gates. - Marcus Weis; Andrzej Pfitzner; Dominik Kasprowicz; Rainer Emling; Wojciech Maly; Doris Schmitt-Landsiedel (ISCAS, 2009)

Field-coupled nanomagnets for interconnect-free nonvolatile computing. - Markus Becherer; György Csaba; Rainer Emling; Wolfgang Porod; Paolo Lugli; Doris Schmitt-Landsiedel (ISSCC, 2009)

Adaptive circuit block model for power supply noise analysis of low power system-on-chip. - Matthias Eireiner; Doris Schmitt-Landsiedel; Paul Wallner; Andreas Schöne; Stephan Henzler; Ulrich Fiedler (SoC, 2009)

Reliability assessment of voltage controlled oscillators in 32nm high-κ metal gate technology. - Florian Chouard; Michael Fulde; Doris Schmitt-Landsiedel (ESSCIRC, 2010)

Invasive Computing: An Overview. - Jürgen Teich; Jörg Henkel; Andreas Herkersdorf; Doris Schmitt-Landsiedel; Wolfgang Schröder-Preikschat; Gregor Snelting (Multiprocessor System-on-Chip, 2011)

An analog perspective on device reliability in 32nm high-κ metal gate technology. - Florian Chouard; Shailesh More; Michael Fulde; Doris Schmitt-Landsiedel (DDECS, 2011)

A variation-aware adaptive voltage scaling technique based on in-situ delay monitoring. - Martin Wirnshofer; Leonhard Heiß; Georg Georgakos; Doris Schmitt-Landsiedel (DDECS, 2011)

An aging suppression and calibration approach for differential amplifiers in advanced CMOS technologies. - Florian Chouard; Shailesh More; Michael Fulde; Doris Schmitt-Landsiedel (ESSCIRC, 2011)

Reducing impact of degradation on analog circuits by chopper stabilization and autozeroing. - Shailesh More; Michael Fulde; Florian Chouard; Doris Schmitt-Landsiedel (ISQED, 2011)

DRAM Yield Analysis and Optimization by a Statistical Design Approach. - Yan Li 030; Helmut Schneider; Florian Schnabel 002; Roland Thewes; Doris Schmitt-Landsiedel (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Adaptive voltage scaling by in-situ delay monitoring for an image processing circuit. - Martin Wirnshofer; Leonhard Heiß; Anil Narayan Kakade; Nasim Pour Aryan; Georg Georgakos; Doris Schmitt-Landsiedel (DDECS, 2012)

Bitline-capacitance-cancelation sensing scheme with 11ns read latency and maximum read throughput of 2.9GB/s in 65nm embedded flash for automotive. - Mihail Jefremow; Thomas Kern; Ulrich Backhausen; Christian Peters; Christoph Parzinger; Christoph Roll; Stephan Kassenetter; Stefanie Thierold; Doris Schmitt-Landsiedel (ISSCC, 2012)

On-Line Supply voltage Scaling Based on in situ Delay Monitoring to Adapt for Pvta variations. - Martin Wirnshofer; Nasim Pour Aryan; Leonhard Heiß; Doris Schmitt-Landsiedel; Georg Georgakos (J. Circuits Syst. Comput., 2012)

A 65nm 4MB embedded flash macro for automotive achieving a read throughput of 5.7GB/s and a write throughput of 1.4MB/s. - Mihail Jefremow; Thomas Kern; Ulrich Backhausen; J. Elbs; B. Rousseau; Christoph Roll; L. Castro; T. Roehr; E. Paparisto; K. Herfurth; R. Bartenschlager; Stefanie Thierold; et al. (ESSCIRC, 2013)

Nanomagnetic logic clocked in the MHz regime. - Markus Becherer; Josef Kiermaier; Stephan Breitkreutz; Irina Eichwald; György Csaba; Doris Schmitt-Landsiedel (ESSDERC, 2013)

Time-differential sense amplifier for sub-80mV bitline voltage embedded STT-MRAM in 40nm CMOS. - Mihail Jefremow; Thomas Kern; Wolf Allers; Christian Peters; Jan Otterstedt; Othmane Bahlous; Karl Hofmann; Robert Allinger; Stephan Kassenetter; Doris Schmitt-Landsiedel (ISSCC, 2013)

Reliability monitoring of digital circuits by in situ timing measurement. - Nasim Pour Aryan; Georg Georgakos; Doris Schmitt-Landsiedel (PATMOS, 2013)

From an analytic NBTI device model to reliability assessment of complex digital circuits. - Nasim Pour Aryan; A. Listl; Leonhard Heiß; Cenk Yilmaz; Georg Georgakos; Doris Schmitt-Landsiedel (IOLTS, 2014)

Power efficient digital IC design for a medical application with high reliability requirements. - Nasim Pour Aryan; Nils Heidmann; Martin Wirnshofer; Nico Hellwege; Jonas Pistor; Dagmar Peters-Drolshagen; Georg Georgakos; Steffen Paul; Doris Schmitt-Landsiedel (PATMOS, 2014)

Emulated ASIC Power and Temperature Monitor System for FPGA Prototyping of an Invasive MPSoC Computing Architecture. - Elisabeth Glocker; Qingqing Chen 004; Asheque M. Zaidi; Ulf Schlichtmann; Doris Schmitt-Landsiedel (CoRR, 2014)

Resilience and yield of flip-flops in future CMOS technologies under process variations and aging. - Christoph Werner; Benedikt Backs; Martin Wirnshofer; Doris Schmitt-Landsiedel (IET Circuits Devices Syst., 2014)

A compact model for NBTI degradation and recovery under use-profile variations and its application to aging analysis of digital integrated circuits. - Veit B. Kleeberger; Martin Barke; Christoph Werner; Doris Schmitt-Landsiedel; Ulf Schlichtmann (Microelectron. Reliab., 2014)

Architectural and Circuit Design Techniques for Power Management of Ultra-Low-Power MCU Systems. - Michael Lueders; Björn Eversmann; Johannes Gerber; Korbinian Huber; Rüdiger Kuhn; Michael Zwerg; Doris Schmitt-Landsiedel; Ralf Brederlow (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Slope only sense amplifier with 4.5ns sense delay for 8Mbit memory sector, employing in situ current monitoring with 66% write speed improvement in 40nm embedded flash for automotive. - Mihail Jefremow; Doris Schmitt-Landsiedel; Thomas Kern; Martin Stiftinger; Christoph Roll (ESSCIRC, 2015)

Modelling and simulation of nanomagnetic logic with cadence virtuoso using Verilog-A. - Grazvydas Ziemys; Andrew Giebfried; Markus Becherer; Irina Eichwald; Doris Schmitt-Landsiedel; Stephan Breitkreutz-v. Gamm (ESSDERC, 2015)

A 13.56MHz class e power amplifier for inductively coupled DC supply with 95% power added efficiency (PAE). - Franz Johann Stubenrauch; Norbert Seliger; Maximilian Schustek; Alexey Lebedev; Doris Schmitt-Landsiedel (EURFID, 2015)

Emulation of an ASIC power and temperature monitor system for FPGA prototyping. - Elisabeth Glocker; Qingqing Chen 004; Asheque M. Zaidi; Ulf Schlichtmann; Doris Schmitt-Landsiedel (ReCoSoC, 2015)

A 9-bit, 1.08ps resolution two-step time-to-digital converter in 65 nm CMOS for time-mode ADC. - Junjie Kong; Stephan Henzler; Doris Schmitt-Landsiedel; Liter Siek (APCCAS, 2016)

In situ measurement of aging-induced performance degradation in digital circuits. - Nasim Pour Aryan; Christian Funke; Jens Bargfrede; Cenk Yilmaz; Doris Schmitt-Landsiedel; Georg Georgakos (ETS, 2016)

Towards Logic-In-Memory circuits using 3D-integrated Nanomagnetic logic. - Fabrizio Riente; Grazvydas Ziemys; Giovanna Turvani; Doris Schmitt-Landsiedel; Stephan Breitkreutz-v. Gamm; Mariagrazia Graziano (ICRC, 2016)

A novel micropump driver used in environmental sensor applications. - Bernadette Kinzel; Detlef Bonfert; Florian Lippert; Frank Vanselow; Erkan Isa; Doris Schmitt-Landsiedel; Linus Maurer (IEEE SENSORS, 2016)

2.9 A 2GHz 244fs-resolution 1.2ps-Peak-INL edge-interpolator-based digital-to-time converter in 28nm CMOS. - Sebastian Sievert; Ofir B. Degani; Assaf Ben Bassat; Rotem Banin; Ashoke Ravi; Bernd-Ulrich Klepser; Zdravko Boos; Doris Schmitt-Landsiedel (ISSCC, 2016)

Dark silicon management: an integrated and coordinated cross-layer approach. - Santiago Pagani; Lars Bauer; Qingqing Chen 004; Elisabeth Glocker; Frank Hannig; Andreas Herkersdorf; Heba Khdr; Anuj Pathania; Ulf Schlichtmann; Doris Schmitt-Landsiedel; Mark Sagi; Éricles Sousa; et al. (it Inf. Technol., 2016)

A 2 GHz 244 fs-Resolution 1.2 ps-Peak-INL Edge Interpolator-Based Digital-to-Time Converter in 28 nm CMOS. - Sebastian Sievert; Ofir Degani; Assaf Ben Bassat; Rotem Banin; Ashoke Ravi; Wolfgang Thomann; Bernd-Ulrich Klepser; Zdravko Boos; Doris Schmitt-Landsiedel (IEEE J. Solid State Circuits, 2016)

Scanning Microwave Microscopy for Electronic Device Analysis on Nanometre Scale. - Sören Hommel; Nicole Killat; Andreas Altes; Thomas Schweinböck; Doris Schmitt-Landsiedel; Marco Silvestri; Oliver Haeberlen (Microelectron. Reliab., 2016)

A 92.1% efficient DC-DC converter for ultra-low power microcontrollers with fast wake-up. - Francesco Santoro; Rüdiger Kuhn; Neil Gibson; Nicola Rasera; Thomas Tost; Doris Schmitt-Landsiedel; Ralf Brederlow (CICC, 2017)

Emulation of an ASIC power and temperature monitoring system (eTPMon) for FPGA prototyping. - Elisabeth Glocker; Qingqing Chen 004; Ulf Schlichtmann; Doris Schmitt-Landsiedel (Microprocess. Microsystems, 2017)