Adding Testability to an Asynchronous Interconnect for GALS SoC. - Aristides Efthymiou; John Bainbridge; Douglas A. Edwards (Asian Test Symposium, 2004)

Automatic Scan Insertion and Pattern Generation for Asynchronous Circuits. - Aristides Efthymiou; Christos P. Sotiriou; Douglas A. Edwards (DATE, 2004)

Test pattern generation and partial-scan methodology for an asynchronous SoC interconnect. - Aristides Efthymiou; John Bainbridge; Douglas A. Edwards (IEEE Trans. Very Large Scale Integr. Syst., 2005)