DC Parameterized Piecewise-Function Transistor Models for Bipolar and MOS Logic Stage Delay Evaluation. - Douglas R. Holberg; Santanu Dutta; Lawrence T. Pillage (ICCAD, 1990)

ETA: electrical-level timing analysis. - Ronn B. Brashear; Douglas R. Holberg; M. Ray Mercer; Lawrence T. Pillage (ICCAD, 1992)