Hardware Compilation from an RTL to a Storage Logic Array Target. - Fredrick J. Hill; Zainalabedin Navabi; Chen H. Chiang; Duan-Ping Chen; Manzer Masud (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1984)

Module Generation of Complex Macros for Logic-Emulation Applications. - Wen-Jong Fang; Allen C.-H. Wu; Duan-Ping Chen (FPGA, 1997)

EmGen-a module generator for logic emulation applications. - Wen-Jong Fang; Allen C.-H. Wu; Duan-Ping Chen (IEEE Trans. Very Large Scale Integr. Syst., 1999)

A corner stitching compliant B∗-tree representation and its applications to analog placement. - Hui-Fang Tsao; Pang-Yen Chou; Shih-Lun Huang; Yao-Wen Chang; Mark Po-Hung Lin; Duan-Ping Chen; Dick Liu (ICCAD, 2011)