A Study of Data Layout in Multi-channel Processing-In-Memory Architecture. - Taeyang Jeong; Duheon Choi; Sangwoo Han; Eui-Young Chung (ICSCA, 2018)

EXTREME: Exploiting Page Table for Reducing Refresh Power of 3D-Stacked DRAM Memory. - Ho Hyun Shin; Young Min Park; Duheon Choi; Byoung Jin Kim; Dae-Hyung Cho; Eui-Young Chung (IEEE Trans. Computers, 2018)

Asymmetric Prefetching Architecture for Multicore Processor. - Duheon Choi; Kwangsu Kim; Eui-Young Chung (ISOCC, 2020)

Per-Operation Reusability Based Allocation and Migration Policy for Hybrid Cache. - Minsik Oh; Kwangsu Kim; Duheon Choi; Hyukjun Lee; Eui-Young Chung (IEEE Trans. Computers, 2020)

Operand-Oriented Virtual Memory Support for Near-Memory Processing. - Duheon Choi; Taeyang Jeong; Joonhyeok Yeom; Eui-Young Chung (IEEE Trans. Computers, 2023)