Time-mode techniques for fast-locking phase-locked loops. - Durand Jarrett-Amor; Young Jun Park 002; Fei Yuan 005 (ISCAS, 2016)

Time integrator for mixed-mode signal processing. - Young Jun Park 002; Durand Jarrett-Amor; Fei Yuan 005 (ISCAS, 2016)

Data transient insensitive phase-locked loops. - Durand Jarrett-Amor; Fei Yuan 005 (NEWCAS, 2016)

A 32 Gb/s, 0.42 pJ/bit Passive Hybrid Simultaneous Bidirectional Transceiver for Die-to-Die Links. - Durand Jarrett-Amor; Kunal Yadav; Danny Zhang; Bangda Yang; Sadegh Jalali; Tony Chan Carusone (ISCAS, 2023)

A 16 Gbps, 0.126 pJ/bit, Single-Ended TIA Driver with Impedance Peaking Control for SBD D2D Links. - Durand Jarrett-Amor; Tony Chan Carusone (NewCAS, 2024)

A Comparison of Single-Ended, NRZ Unidirectional Signaling and Single-Ended, NRZ Simultaneous-Bidirectional Signaling for Die-to-Die Links. - Durand Jarrett-Amor; Tony Chan Carusone (IEEE Micro, 2025)