A Fast and Accurate FPGA-Based Fault Injection System. - Thomas Schweizer; Dustin Peterson; Johannes Maximilian Kühn; Tommy Kuhn; Wolfgang Rosenstiel (FCCM, 2013)

Testing reliability techniques for SoCs with fault tolerant CGRA by using live FPGA fault injection. - Johannes Maximilian Kühn; Thomas Schweizer; Dustin Peterson; Tommy Kuhn; Wolfgang Rosenstiel (FPT, 2013)

StML: Bridging the gap between FPGA design and HDL circuit description. - Dustin Peterson; Oliver Bringmann 001; Thomas Schweizer; Wolfgang Rosenstiel (FPT, 2013)

Spatial and temporal granularity limits of body biasing in UTBB-FDSOI. - Johannes Maximilian Kühn; Dustin Peterson; Hideharu Amano; Oliver Bringmann 001; Wolfgang Rosenstiel (DATE, 2015)

End-to-Display Encryption: A Pixel-Domain Encryption with Security Benefit. - Sebastian Matthias Burg; Dustin Peterson; Oliver Bringmann 001 (IH&MMSec, 2015)

SMoSi: A framework for the derivation of sleep mode traces from RTL simulations. - Dustin Peterson; Oliver Bringmann 001 (ASP-DAC, 2016)

Neues Konzept zur Steigerung der Zuverlässigkeit einer ARM-basierten Prozessorarchitektur unter Verwendung eines CGRAs. - Konstantin Lübeck; David Morgenstern; Thomas Schweizer; Dustin Peterson; Wolfgang Rosenstiel; Oliver Bringmann 001 (MBMV, 2016)

Detecting non-functional circuit activity in SoC designs. - Dustin Peterson; Yannick Boekle; Oliver Bringmann 001 (ASP-DAC, 2018)

Fully-automated synthesis of power management controllers from UPF. - Dustin Peterson; Oliver Bringmann 001 (ASP-DAC, 2019)

Power-Gating Models for Rapid Design Exploration. - Dustin Peterson; Oliver Bringmann 001 (NEWCAS, 2019)