Opportunities and challenges in asymmetric device implementation [CMOS device scaling]. - J. F. Buller; R. van Bentum; J. Cheek; E. Ehrichs; M. Horstmann; S. Searles (CICC, 2004)

Process Window and Device Variations Evaluation using Array-Based Characterization Circuits. - C. Tabery; M. Craig; Gert Burbach; B. Wagner; S. McGowan; P. Etter; S. Roling; C. Haidinyak; E. Ehrichs (ISQED, 2006)