Hardware and Power Requirements of Self-checking circuits. - A. P. Kakaroudas; Kyriakos Papadomanolakis; E. Karaolis; Spiros Nikolaidis 001; Nikolaos Alachiotis 002; Costas E. Goutis (ICECS, 1999)

Fault secure binary counter design. - E. Karaolis; Spiros Nikolaidis 001; Costas E. Goutis (ICECS, 1999)

Estimation of the transition activity in MAC architectures implementing FIR filters. - Spiros Nikolaidis 001; E. Karaolis; Efstathios D. Kyriakis-Bitzaros (ICECS, 1999)

Estimation of signal transition activity in FIR filters implementedby a MAC architecture. - Spiridon Nikolaidis 001; E. Karaolis; Efstathios D. Kyriakis-Bitzaros (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

A Methodology for Calculating the Undetectable Double-Faults in Self-Checking Circuits. - Spiridon Nikolaidis 001; E. Karaolis; Athanasios Kakarountas; Kyriakos Papadomanolakis; Constantinos E. Goutis (J. Circuits Syst. Comput., 2003)