Power droop reduction during Launch-On-Shift scan-based logic BIST. - Martin Omaña 001; Daniele Rossi 001; Edda Beniamino; Cecilia Metra; Chandra Tirumurti; Rajesh Galivanche (DFT, 2014)

Low-Cost and High-Reduction Approaches for Power Droop during Launch-On-Shift Scan-Based Logic BIST. - Martin Omaña 001; Daniele Rossi 001; Edda Beniamino; Cecilia Metra; Chandrasekharan Tirumurti; Rajesh Galivanche (IEEE Trans. Computers, 2016)