Computer-Aided Design of Microwave Circuits - Edgar Sánchez-Sinencio (1973)

AROMA: An Area Optimized CAD Program for Cascade SC Filter Design. - Edgar Sánchez-Sinencio; Jaime Ramírez-Angulo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1985)

Operational transconductance amplifier-based nonlinear function syntheses. - Edgar Sánchez-Sinencio; Jaime Ramírez-Angulo; Bernabé Linares-Barranco; Ángel Rodríguez-Vázquez (IEEE J. Solid State Circuits, 1989)

Programmable switched-capacitor bump equalizer architecture. - J. Francisco Duque-Carrillo; Jose Silva-Martinez; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 1990)

Active compensation of operational transconductance amplifier filters using partial positive feedback. - Jaime Ramírez-Angulo; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 1990)

CMOS Continuous BAM With On Chip Learning. - Bernabé Linares-Barranco; Edgar Sánchez-Sinencio; Ángel Rodríguez-Vázquez; José Luis Huertas (IWANN, 1991)

CMOS OTA-C high-frequency sinusoidal oscillators. - Bernabé Linares-Barranco; Ángel Rodríguez-Vázquez; Edgar Sánchez-Sinencio; José L. Huertas (IEEE J. Solid State Circuits, 1991)

A CMOS implementation of FitzHugh-Nagumo neuron model. - Bernabé Linares-Barranco; Edgar Sánchez-Sinencio; Ángel Rodríguez-Vázquez; José L. Huertas (IEEE J. Solid State Circuits, 1991)

A modular CMOS design of a Hamming network. - Moises E. Robinson; Hideki Yoneda; Edgar Sánchez-Sinencio (IEEE Trans. Neural Networks, 1992)

A modular T-mode design approach for analog neural network hardware implementations. - Bernabé Linares-Barranco; Edgar Sánchez-Sinencio; Ángel Rodríguez-Vázquez; José L. Huertas (IEEE J. Solid State Circuits, 1992)

A MOSFET-C variable equalizer circuit with simple on-chip automatic tuning. - Satoshi Sakurai; Mohamnmed Ismail; Jean-Yves Michel; Edgar Sánchez-Sinencio; Robert Brannen (IEEE J. Solid State Circuits, 1992)

Analog neural programmable optimizers in CMOS VLSI technologies. - Rafael Domínguez-Castro; Ángel Rodríguez-Vázquez; José Luis Huertas; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 1992)

High Frequency Compensated Current-mode Ladder Filters Using Multiple Output OTAs. - Jaime Ramírez-Angulo; Edgar Sánchez-Sinencio (ISCAS, 1993)

Linearity, Accuracy and Bandwidth Considerations in Wideband CMOS Voltage Amplifiers. - Jaime Ramírez-Angulo; Roberto Sadkowski; Edgar Sánchez-Sinencio (ISCAS, 1993)

3v High-frequency Current-mode Filters. - Sterling L. Smith; Edgar Sánchez-Sinencio (ISCAS, 1993)

A CMOS analog adaptive BAM with on-chip learning and weight refreshing. - Bernabé Linares-Barranco; Edgar Sánchez-Sinencio; Ángel Rodríguez-Vázquez; José L. Huertas (IEEE Trans. Neural Networks, 1993)

A high-density and low-power charge-based Hamming network. - Yuping He; Ugur Çilingiroglu; Edgar Sánchez-Sinencio (IEEE Trans. Very Large Scale Integr. Syst., 1993)

A Programmable 1.8-18MHz High-Q Fully-Differential Continuous-Time Filter with 1.5-2 Power Supply. - Joseph T. Nabicht; Edgar Sánchez-Sinencio; Jaime Ramírez-Angulo (ISCAS, 1994)

Two Approaches for Current-Mode Filters using Voltage Follower and Transconductance Multipliers Building Blocks. - Jaime Ramírez-Angulo; Edgar Sánchez-Sinencio (ISCAS, 1994)

A power supply ramping and current measurement based technique for analog fault diagnosis. - Shyam S. Somayajula; Edgar Sánchez-Sinencio; José Pineda de Gyvez (VTS, 1994)

Smart-pixel cellular neural networks in analog current-mode CMOS technology. - Servando Espejo; Ángel Rodríguez-Vázquez; Rafael Domínguez-Castro; John L. Huertas; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 1994)

A Universal Interface Between PC and Neural Networks Hardware. - Apollo Q. Fong; Ajay Kanji; Edgar Sánchez-Sinencio; José Pineda de Gyvez (ISCAS, 1995)

A Nonlinear Macromodel for CMOS OTAs. - Gabriel J. Gómez; Sherif H. K. Embabi; Edgar Sánchez-Sinencio; Martin C. Lefebvre (ISCAS, 1995)

A General Purpose Discrete-Time Multiplexing Neuron-Array Architecture. - Gunhee Han; Edgar Sánchez-Sinencio (ISCAS, 1995)

A Design Scheme to Stabilize the Active Gain Enhancement Amplifier. - Fan You; Sherif H. K. Embabi; Edgar Sánchez-Sinencio; A. Ganesan (ISCAS, 1995)

A new method for wavelets generation. - Adrién Martínez-González; Laura Ortiz-Balbuena; Héctor M. Pérez Meana; Edgar Sánchez-Sinencio; Juan Carlos Sánchez-García (EUSIPCO, 1996)

A 1.5V class AB output buffer. - Fan You; Sherif H. K. Embabi; Edgar Sánchez-Sinencio (ISLPED, 1996)

VERDI: an acoustically programmable and adjustable CMOS mixed-mode signal processor for hearing aid applications. - J. Francisco Duque-Carrillo; Piero Malcovati; Franco Maloberti; Raquel Pérez-Aloe; Alexander H. Reyes; Edgar Sánchez-Sinencio; Guido Torelli; José M. Valverde (IEEE J. Solid State Circuits, 1996)

Programmable time-multiplexed switched-capacitor variable equalizer for arbitrary frequency response realizations. - Raquel Pérez-Aloe; J. Francisco Duque-Carrillo; Edgar Sánchez-Sinencio; José M. Valverde; Guido Torelli; Alexander H. Reyes; Franco Maloberti (IEEE J. Solid State Circuits, 1997)

Am improved tail current source for low voltage applications. - Fan You; Sherif H. K. Embabi; J. Francisco Duque-Carrillo; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 1997)

Multistage amplifier topologies with nested Gm-C compensation. - Fan You; Sherif H. K. Embabi; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 1997)

Cork quality classification system using a unified image processing and fuzzy-neural network methodology. - Joongho Chang; Gunhee Han; José M. Valverde; Norman C. Griswold; J. Francisco Duque-Carrillo; Edgar Sánchez-Sinencio (IEEE Trans. Neural Networks, 1997)

A 1.8 V pseudo-differential switched-capacitor amplifier. - Zeki Sezgin Günay; Eric G. Soenen; Sherif H. K. Embabi; Edgar Sánchez-Sinencio (CICC, 1998)

A current-mode based field programmable analog array architecture for signal processing applications. - X. Quan; Sherif H. K. Embabi; Edgar Sánchez-Sinencio (CICC, 1998)

A Unified Approach for a Time-Domain Built-In Self-Test Technique and Fault Detection. - Benoit Provost; Edgar Sánchez-Sinencio; Anna Maria Brosa (Great Lakes Symposium on VLSI, 1998)

A parallel analog median filter. - Alejandro Díaz-Sánchez; Jaime Ramírez-Angulo; Antonio Lopez; Edgar Sánchez-Sinencio (ICECS, 1998)

Efficient clock recovery architecture. - Marcia G. Méndez-Rivera; Ari Yakov Valero-López; José Silva-Martínez; Edgar Sánchez-Sinencio (ICECS, 1998)

An accurate quality factor tuning scheme for IF and high-Q continuous-time filters. - Jan-Michael Stevenson; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 1998)

Low-voltage class AB buffers with quiescent current control. - Fan You; Sherif H. K. Embabi; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 1998)

Time multiplexed color image processing based on a CNN with cell-state outputs. - Lei Wang; José Pineda de Gyvez; Edgar Sánchez-Sinencio (IEEE Trans. Very Large Scale Integr. Syst., 1998)

CMOS cryptosystem using a Lorenz chaotic oscillator. - Octavio A. González; Gunhee Han; José Pineda de Gyvez; Edgar Sánchez-Sinencio (ISCAS (5), 1999)

A low voltage fully differential nested Gm capacitance compensation amplifier: analysis and design. - G. Xu; Sherif H. K. Embabi; P. Hao; Edgar Sánchez-Sinencio (ISCAS (2), 1999)

Auto-calibrating analog timer for on-chip testing. - Benoit Provost; Edgar Sánchez-Sinencio (ITC, 1999)

Periodical nonuniform individually sampled switched-capacitor circuits. - José L. Ausín; Juan F. Duque-Carillo; Guido Torelli; Edgar Sánchez-Sinencio; Franco Maloberti (ISCAS, 2000)

A fully parallel CMOS analog median filter. - Alejandro Díaz-Sánchez; Jaime Ramírez-Angulo; Antonio Lopez; Edgar Sánchez-Sinencio (ISCAS, 2000)

Different operational transconductance amplifier topologies for obtaining very small transconductances. - Anand Veeravalli; Edgar Sánchez-Sinencio; José Silva-Martínez (ISCAS, 2000)

A programmable rail-to-rail constant-gm input structure for LV amplifier. - Shouli Yan; Edgar Sánchez-Sinencio (ISCAS, 2000)

1.5 V 5.0 MHz switched capacitor circuits in 1.2 μm CMOS without voltage bootstrapper. - Lei Wang; Sherif H. K. Embabi; Edgar Sánchez-Sinencio (CICC, 2001)

A comparative study of digital ΣΔ modulators for fractional-N synthesis. - Keliu Shu; Edgar Sánchez-Sinencio; Franco Maloberti; Udaykiran Eduri (ICECS, 2001)

Linear cellular neural networks. - Federico Lobato-Lopez; José Silva-Martínez; Edgar Sánchez-Sinencio (ISCAS (3), 2001)

A low voltage operational transconductance amplifier using common mode feedforward for high frequency switched capacitor circuits. - Asit Shankar; José Silva-Martínez; Edgar Sánchez-Sinencio (ISCAS (1), 2001)

A 2.1GHz 1.3V 5mW programmable Q-enhancement LC bandpass biquad in 0.35μm CMOS. - Fikret Duelgel; Edgar Sánchez-Sinencio; Jose Silva-Martinez (CICC, 2002)

A monolithic CMOS low-IF Bluetooth receiver. - Wenjun Sheng; Bo Xia; Ahmed Emira; Chunyu Xin; Sung Tae Moon; Ari Yakov Valero-López; Edgar Sánchez-Sinencio (CICC, 2002)

High-selectivity SC filters with continuous digital Q-factor programmability. - José L. Ausín; Raquel Pérez-Aloe; J. Francisco Duque-Carrillo; Guido Torelli; Edgar Sánchez-Sinencio (ISCAS (4), 2002)

Design trade-offs of a symmetric linearized CMOS LC VCO. - Fikret Dülger; Edgar Sánchez-Sinencio (ISCAS (4), 2002)

Design tradeoffs of CMOS current mirrors using one-equation for all-region model. - Ahmed Emira; Edgar Sánchez-Sinencio; M. Schneider (ISCAS (5), 2002)

An improved Q-tuning scheme and a fully symmetric OTA. - Praveen Kallam; Edgar Sánchez-Sinencio; Aydin I. Karsilayan (ISCAS (5), 2002)

On-chip spectrum analyzer for built-in testing analog ICs. - Marcia G. Méndez-Rivera; José Silva-Martínez; Edgar Sánchez-Sinencio (ISCAS (5), 2002)

A 2-V 11-bit incremental A/D converter using floating gate technique. - A. N. Mohieldin; Ahmed Emira; Edgar Sánchez-Sinencio (ISCAS (4), 2002)

A 5-GHz prescaler using improved phase switching. - Keliu Shu; Edgar Sánchez-Sinencio (ISCAS (3), 2002)

A 2.1-GHz monolithic frequency synthesizer with robust phase switching prescaler and loop capacitance scaling. - Keliu Shu; Edgar Sánchez-Sinencio; José Silva-Martínez (ISCAS (4), 2002)

An auto-tuning structure for continuous time sigma-delta AD converter and high precision filters. - Bo Xia; Shouli Yan; Edgar Sánchez-Sinencio (ISCAS (5), 2002)

A mixed-mode IF GFSK demodulator for Bluetooth. - Chunyu Xin; Bo Xia; Wenjun Sheng; Ari Yakov Valero-López; Edgar Sánchez-Sinencio (ISCAS (3), 2002)

A 100-MHz 8-mW ROM-less quadrature direct digital frequency synthesizer. - Ahmed Nader Mohieldin; Ahmed A. Emira; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2002)

Transconductance amplifier structures with very small transconductances: a comparative design approach. - Anand Veeravalli; Edgar Sánchez-Sinencio; José Silva-Martínez (IEEE J. Solid State Circuits, 2002)

A CMOS transconductance amplifier architecture with wide tuning range for very low frequency applications. - Anand Veeravalli; Edgar Sánchez-Sinencio; José Silva-Martínez (IEEE J. Solid State Circuits, 2002)

Variable gain amplifier with offset cancellation. - Ahmed Emira; Edgar Sánchez-Sinencio (ACM Great Lakes Symposium on VLSI, 2003)

A low-power CMOS complex filter for Bluetooth with frequency tuning. - Ahmed Emira; Edgar Sánchez-Sinencio (ISCAS (1), 2003)

An Analog Integrated Circuit Design Laboratory. - Antonio F. Mondragón-Torres; Terry Mayhugh Jr.; José Pineda de Gyvez; José Silva-Martínez; Edgar Sánchez-Sinencio (MSE, 2003)

A 1.3-V 5-mW fully integrated tunable bandpass filter at 2.1 GHz in 0.35-μm CMOS. - Fikret Dulger; Edgar Sánchez-Sinencio; José Silva-Martínez (IEEE J. Solid State Circuits, 2003)

An enhanced adaptive Q-tuning scheme for a 100-MHz fully symmetric OTA-based bandpass filter. - Praveen Kallam; Edgar Sánchez-Sinencio; Aydin Ilker Karsilayan (IEEE J. Solid State Circuits, 2003)

A wide input bandwidth 7-bit 300-MSample/s folding and current-mode interpolating ADC. - Yunchu Li; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2003)

A fully balanced pseudo-differential OTA with common-mode feedforward and inherent common-mode feedback detector. - Ahmed Nader Mohieldin; Edgar Sánchez-Sinencio; José Silva-Martínez (IEEE J. Solid State Circuits, 2003)

A 2.7-V 1.8-GHz fourth-order tunable LC bandpass filter based on emulation of magnetically coupled resonators. - Ahmed N. Mohieldin; Edgar Sánchez-Sinencio; José Silva-Martínez (IEEE J. Solid State Circuits, 2003)

On-chip ramp generators for mixed-signal BIST and ADC self-test. - Benoit Provost; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2003)

A 3-V, 0.35-μm CMOS Bluetooth receiver IC. - Wenjun Sheng; Bo Xia; Ahmed E. Emira; Chunyu Xin; Ari Yakov Valero-López; Sung Tae Moon; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2003)

A 2.4-GHz monolithic fractional-N frequency synthesizer with robust phase-switching prescaler and loop capacitance multiplier. - Keliu Shu; Edgar Sánchez-Sinencio; José Silva-Martínez; Sherif H. K. Embabi (IEEE J. Solid State Circuits, 2003)

A GFSK demodulator for low-IF Bluetooth receiver. - Bo Xia; Chunyu Xin; Wenjun Sheng; Ari Yakov Valero-López; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2003)

Switched-capacitor circuits with periodical nonuniform individual sampling. - José L. Ausín; J. Francisco Duque-Carrillo; Guido Torelli; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

A pseudo differential complex filter for Bluetooth with frequency tuning. - Ahmed A. Emira; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

Nonlinear effects in pseudo differential OTAs with CMFB. - A. N. Mohieldin; Edgar Sánchez-Sinencio; José Silva-Martínez (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

A highly linear pseudo-differential transconductance [CMOS OTA]. - Faramarz Bahmani; Edgar Sánchez-Sinencio (ESSCIRC, 2004)

A dual-mode low-pass filter for 802.11b/Bluetooth receiver. - Ahmed Nader Mohieldin; Edgar Sánchez-Sinencio (ESSCIRC, 2004)

A configurable time-interleaved pipeline ADC for multi-standard wireless receivers. - Bo Xia; Alberto Valdes-Garcia; Edgar Sánchez-Sinencio (ESSCIRC, 2004)

Dynamic range, noise and linearity optimization of continuous-time OTA-C filters. - Slawomir Koziel; A. Ramachandran; Stanislaw Szczepanski; Edgar Sánchez-Sinencio (ICECS, 2004)

Single Miller capacitor compensated multistage amplifiers for large capacitive load applications. - Xiaohua Fan; Chinmaya Mishra; Edgar Sánchez-Sinencio (ISCAS (1), 2004)

Linearized CMOS OTA using active-error feedforward technique. - Stanislaw Szczepanski; Slawomir Koziel; Edgar Sánchez-Sinencio (ISCAS (1), 2004)

Frequency synthesizer for on-chip testing and automated tuning. - Ari Yakov Valero-López; Alberto Valdes-Garcia; Edgar Sánchez-Sinencio (ISCAS (4), 2004)

A linearization technique for RF low noise amplifier. - Chunyu Xin; Edgar Sánchez-Sinencio (ISCAS (4), 2004)

3-22GHz CMOS distributed single-balanced mixer. - Xiaohua Fan; Edgar Sánchez-Sinencio (SoCC, 2004)

An On-Chip Transfer Function Characterization System for Analog Built-in Testing. - Alberto Valdes-Garcia; José Silva-Martínez; Edgar Sánchez-Sinencio (VTS, 2004)

A continuous-time sigma-delta modulator with 88-dB dynamic range and 1.1-MHz signal bandwidth. - Shouli Yan; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2004)

A fully parallel CMOS analog median filter. - Alejandro Díaz-Sánchez; Jaime Ramírez-Angulo; Antonio J. López-Martín; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2004)

An RC time constant auto-tuning structure for high linearity continuous-time ΣΔ modulators and active filters. - Bo Xia; Shouli Yan; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

A practical self-calibration scheme implementation for pipeline ADC. - Benoit Provost; Edgar Sánchez-Sinencio (IEEE Trans. Instrum. Meas., 2004)

A constant-gm rail-to-rail op amp input stage using dynamic current scaling technique. - Shouli Yan; Jingyu Hu; Tongyu Song; Edgar Sánchez-Sinencio (ISCAS (3), 2005)

Constant-gm techniques for rail-to-rail CMOS amplifier input stages: a comparative study. - Shouli Yan; Jingyu Hu; Tongyu Song; Edgar Sánchez-Sinencio (ISCAS (3), 2005)

Feedforward reversed nested Miller compensation techniques for three-stage amplifiers. - Feng Zhu; Shouli Yan; Jingyu Hu; Edgar Sánchez-Sinencio (ISCAS (3), 2005)

A CMOS RF RMS Detector for Built-in Testing of Wireless Transceivers. - Alberto Valdes-Garcia; Radhika Venkatasubramanian; Rangakrishnan Srinivasan; José Silva-Martínez; Edgar Sánchez-Sinencio (VTS, 2005)

An On-Chip Spectrum Analyzer for Analog Built-In Testing. - Marcia G. Méndez-Rivera; Alberto Valdes-Garcia; José Silva-Martínez; Edgar Sánchez-Sinencio (J. Electron. Test., 2005)

Single Miller capacitor frequency compensation technique for low-power multistage amplifiers. - Xiaohua Fan; Chinmaya Mishra; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2005)

A capacitor cross-coupled common-gate low-noise amplifier. - Wei Zhuo 003; Xiaoyong Li 001; Sudip Shekhar; Sherif H. K. Embabi; José Pineda de Gyvez; David J. Allstot; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

A rail-to-rail amplifier input stage with ±0.35%gm fluctuation. - Timothy Wayne Fischer; Aydin I. Karsilayan; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Second order dynamic element matching technique for low oversampling delta sigma ADC. - A. K. Gupta; Edgar Sánchez-Sinencio; S. Karthikeyan; Wern Ming Koe; Yong-In Park (ISCAS, 2006)

On-Chip Testing Techniques for RF Wireless Transceivers. - Alberto Valdes-Garcia; José Silva-Martínez; Edgar Sánchez-Sinencio (IEEE Des. Test Comput., 2006)

An Integrated Frequency Response Characterization System With a Digital Interface for Analog Testing. - Alberto Valdes-Garcia; Faisal Abdel-Latif Hussien; José Silva-Martínez; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2006)

Self-calibrated quadrature generator for WLAN multistandard frequency synthesizer. - Ari Yakov Valero-López; Sung Tae Moon; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2006)

A 10-bit 44-MS/s 20-mW configurable time-interleaved pipeline ADC for a dual-mode 802.11b/Bluetooth receiver. - Bo Xia; Alberto Valdes-Garcia; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2006)

A Stable Loss Control Feedback Loop for VCO Amplitude Tuning. - Faramarz Bahmani; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

Frequency-dependent harmonic-distortion analysis of a linearized cross-coupled CMOS OTA and its application to OTA-C filters. - Jianlong Chen; Edgar Sánchez-Sinencio; José Silva-Martínez (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

Chameleon: a dual-mode 802.11b/Bluetooth receiver system design. - Ahmed A. Emira; Alberto Valdes-Garcia; Bo Xia; A. N. Mohieldin; Ari Yakov Valero-López; Sung Tae Moon; Chunyu Xin; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

Robust highly linear high-frequency CMOS OTA with IM3 below - 70 dB at 26 MHz. - Wenchang Huang; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

CMOS RF receiver system design: a systematic approach. - Wenjun Sheng; Ahmed Emira; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

THD+Noise Estimation in Class-D Amplifiers. - Burak Kelleci; Edgar Sánchez-Sinencio; Aydin I. Karsilayan (ISCAS, 2007)

A Low-Power Frequency Synthesizer with Quadrature Signal Generation for 2.4 GHz Zigbee Transceiver Applications. - Rangakrishnan Srinivasan; Didem Zeliha Turker; Sang Wook Park; Edgar Sánchez-Sinencio (ISCAS, 2007)

Low THD bandpass-based oscillator using multilevel hard limiter. - Faramarz Bahmani; Edgar Sánchez-Sinencio (IET Circuits Devices Syst., 2007)

A general framework for evaluating nonlinearity, noise and dynamic range in continuous-time OTA-C filters for computer-aided design and optimization. - Slawomir Koziel; A. Ramachandran; Stanislaw Szczepanski; Edgar Sánchez-Sinencio (Int. J. Circuit Theory Appl., 2007)

A 1.1 GHz Fifth Order Active-LC Butterworth Type Equalizing Filter. - Vijay Dhanasekaran; Manisha Gambhir; José Silva-Martínez; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2007)

Nonlinear Shaping SC Oscillator With Enhanced Linearity. - Sang Wook Park; José L. Ausín; Faramarz Bahmani; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2007)

An 11-Band 3-10 GHz Receiver in SiGe BiCMOS for Multiband OFDM UWB Communication. - Alberto Valdes-Garcia; Chinmaya Mishra; Faramarz Bahmani; José Silva-Martínez; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2007)

An Accurate Automatic Quality-Factor Tuning Scheme for Second-Order LC Filters. - Faramarz Bahmani; Teresa Serrano-Gotarredona; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Low-Power Architecture and Circuit Techniques for High-Boost Wide-Band Gm-C Filters. - Manisha Gambhir; Vijay Dhanasekaran; José Silva-Martínez; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Full On-Chip CMOS Low-Dropout Voltage Regulator. - Robert Jon Milliken; José Silva-Martínez; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Design of a Class D Audio Amplifier IC Using Sliding Mode Control and Negative Feedback. - Miguel Angel Rojas González; Edgar Sánchez-Sinencio (IEEE Trans. Consumer Electron., 2007)

A low power 1.3GHz dual-path current mode Gm-C filter. - Manisha Gambhir; Vijay Dhanasekaran; José Silva-Martínez; Edgar Sánchez-Sinencio (CICC, 2008)

A 1.2mW 1.6Vpp-Swing Class-AB 16Ω Headphone Driver Capable of Handling Load Capacitance up to 22nF. - Vijay Dhanasekaran; José Silva-Martínez; Edgar Sánchez-Sinencio (ISSCC, 2008)

A Noise Reduction and Linearity Improvement Technique for a Differential Cascode LNA. - Xiaohua Fan; Heng Zhang; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2008)

A Current Injection Built-In Test Technique for RF Low-Noise Amplifiers. - Xiaohua Fan; Marvin Onabajo; Félix O. Fernandez-Rodriguez; José Silva-Martínez; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Applications of Multipath Transform-Domain Charge-Sampling Wide-Band Receivers. - Pradeep Kotte Prakasam; Mandar Kulkarni; Xi Chen; Zhuizhuan Yu; Sebastian Hoyos; José Silva-Martínez; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

A Robust and Scalable Constant- gm Rail-to-Rail CMOS Input Stage With Dynamic Feedback for VLSI Cell Libraries. - Tongyu Song; Jingyu Hu; Xiaohong Li 007; Edgar Sánchez-Sinencio; Shouli Yan (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

A Broadband CMOS Amplitude Detector for On-Chip RF Measurements. - Alberto Valdes-Garcia; Radhika Venkatasubramanian; José Silva-Martínez; Edgar Sánchez-Sinencio (IEEE Trans. Instrum. Meas., 2008)

New applications and technology scaling driving next generation A/D converters. - Heng Zhang; Mohamed Mostafa Elsayed; Edgar Sánchez-Sinencio (ECCTD, 2009)

A 20MHz BW 68dB DR CT ΔΣ ADC based on a multi-bit time-domain quantizer and feedback element. - Vijay Dhanasekaran; Manisha Gambhir; Mohamed M. Elsayed; Edgar Sánchez-Sinencio; José Silva-Martínez; Chinmaya Mishra; Lei Chen; Erik Pankratz (ISSCC, 2009)

A 25mA 0.13µm CMOS LDO regulator with power-supply rejection better than -56dB up to 10MHz using a feedforward ripple-cancellation technique. - Mohamed El-Nozahi; Ahmed Amer; Joselyn Torres; Kamran Entesari; Edgar Sánchez-Sinencio (ISSCC, 2009)

Two Class-D audio amplifiers with 89/90% efficiency and 0.02/0.03% THD+N consuming less than 1mW of quiescent power. - Miguel Angel Rojas González; Edgar Sánchez-Sinencio (ISSCC, 2009)

A 1-V +31 dBm IIP3, Reconfigurable, Continuously Tunable, Power-Adjustable Active-RC LPF. - Hesam Amir Aslanzadeh; Erik John Pankratz; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2009)

Design of Three-Stage Class-AB 16ΩHeadphone Driver Capable of Handling Wide Range of Load Capacitance. - Vijay Dhanasekaran; José Silva-Martínez; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2009)

Low-Power High-Efficiency Class D Audio Power Amplifiers. - Miguel Angel Rojas González; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2009)

RF Oscillator Based on a Passive RC Bandpass Filter. - Sang Wook Park; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2009)

A Low-Power, Linearized, Ultra-Wideband LNA Design Technique. - Heng Zhang; Xiaohua Fan; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2009)

Power-Aware Multiband-Multistandard CMOS Receiver System-Level Budgeting. - Mohamed El-Nozahi; Edgar Sánchez-Sinencio; Kamran Entesari (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

System and Circuit Design for an MB-OFDM UWB Frequency Synthesizer. - Chinmaya Mishra; Alberto Valdes-Garcia; Edgar Sánchez-Sinencio; José Silva-Martínez (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

An On-Chip Loopback Block for RF Transceiver Built-In Test. - Marvin Onabajo; José Silva-Martínez; Félix O. Fernandez-Rodriguez; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

A 140mA 90nm CMOS low drop-out regulator with -56dB power supply rejection at 10MHz. - Ahmed Amer; Edgar Sánchez-Sinencio (CICC, 2010)

A 470μW clock-free current-controlled class D amplifier with 0.02% THD+N and 82dB PSRR. - Joselyn Torres; Adrian Colli-Menchi; Miguel Angel Rojas González; Edgar Sánchez-Sinencio (ESSCIRC, 2010)

High PSR Low Drop-Out Regulator With Feed-Forward Ripple Cancellation Technique. - Mohamed El-Nozahi; Ahmed Amer; Joselyn Torres; Kamran Entesari; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2010)

A Millimeter-Wave (23-32 GHz) Wideband BiCMOS Low-Noise Amplifier. - Mohamed El-Nozahi; Edgar Sánchez-Sinencio; Kamran Entesari (IEEE J. Solid State Circuits, 2010)

A Low THD, Low Power, High Output-Swing Time-Mode-Based Tunable Oscillator Via Digital Harmonic-Cancellation Technique. - Mohamed M. Elsayed; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2010)

Attenuation-Predistortion Linearization of CMOS OTAs With Digital Correction of Process Variations in OTA-C Filter Applications. - Mohamed Mobarak; Marvin Onabajo; José Silva-Martínez; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2010)

A fully integrated highly linear efficient power amplifier in 0.25µm BiCMOS technology for wireless applications. - Hajir Hedayati; Mohamed Mobarak; Guillaume Varin; Philippe Meunier; Patrice Gamand; Edgar Sánchez-Sinencio; Kamran Entesari (CICC, 2011)

A 0.6-to-200MSPS speed reconfigurable and 1.9-to-27mW power scalable 10bit ADC. - Heng Zhang; Junhua Tan; Chao Zhang; Hongbo Chen; Edgar Sánchez-Sinencio (ESSCIRC, 2011)

A Wideband Millimeter-Wave Frequency Synthesis Architecture Using Multi-Order Harmonic-Synthesis and Variable N -Push Frequency Multiplication. - Mohammed M. Abdul-Latif; Mohamed M. Elsayed; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2011)

A Continuous Time Multi-Bit Delta Sigma ADC Using Time Domain Quantizer and Feedback Element. - Vijay Dhanasekaran; Manisha Gambhir; Mohamed M. Elsayed; Edgar Sánchez-Sinencio; José Silva-Martínez; Chinmaya Mishra; Lei Chen; Erik Pankratz (IEEE J. Solid State Circuits, 2011)

An Inductor-Less Noise-Cancelling Broadband Low Noise Amplifier With Composite Transistor Pair in 90 nm CMOS Technology. - Mohamed El-Nozahi; Ahmed A. Helmy; Edgar Sánchez-Sinencio; Kamran Entesari (IEEE J. Solid State Circuits, 2011)

A 0.8 ps DNL Time-to-Digital Converter With 250 MHz Event Rate in 65 nm CMOS for Time-Mode-Based Sigma Delta Modulator. - Mohamed M. Elsayed; Vijay Dhanasekaran; Manisha Gambhir; José Silva-Martínez; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2011)

A Micropower Low-Noise Neural Recording Front-End Circuit for Epileptic Seizure Detection. - Chengliang Qian; Jordi Parramon; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2011)

A Low-Power High-PSRR Clock-Free Current-Controlled Class-D Audio Amplifier. - Joselyn Torres; Adrian Colli-Menchi; Miguel Angel Rojas González; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2011)

A DCVSL Delay Cell for Fast Low Power Frequency Synthesis Applications. - Didem Zeliha Turker; Sunil P. Khatri; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Linearization Techniques for CMOS Low Noise Amplifiers: A Tutorial. - Heng Zhang; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Challenges of printed electronics on flexible substrates. - Joseph S. Chang; Tong Ge; Edgar Sánchez-Sinencio (MWSCAS, 2012)

Ultra-low-voltage power management unit for thermal energy harvesting applications. - Moataz Abdelfattah; Ahmed Nader Mohieldin; Ahmed Emira; Ahmed K. Hussien; Edgar Sánchez-Sinencio (NEWCAS, 2012)

Low Phase Noise Wide Tuning Range N-Push Cyclic-Coupled Ring Oscillators. - Mohammed M. Abdul-Latif; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2012)

A 2-GHz Highly Linear Efficient Dual-Mode BiCMOS Power Amplifier Using a Reconfigurable Matching Network. - Hajir Hedayati; Mohamed Mobarak; Guillaume Varin; Philippe Meunier; Patrice Gamand; Edgar Sánchez-Sinencio; Kamran Entesari (IEEE J. Solid State Circuits, 2012)

Multiloop High-Power-Supply-Rejection Quadrature Ring Oscillator. - Erik Pankratz; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2012)

Advanced Quenching Techniques for Super-Regenerative Radio Receivers. - Félix O. Fernandez-Rodriguez; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

A biopotential amplifier with improved common mode gain. - Reza Abdullah; Edgar Sánchez-Sinencio (LASCAS, 2013)

A Spur-Frequency-Boosting PLL With a -74 dBc Reference-Spur Suppression in 90 nm Digital CMOS. - Mohamed M. Elsayed; Mohammed M. Abdul-Latif; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2013)

A Low-Power Configurable Neural Recording System for Epileptic Seizure Detection. - Chengliang Qian; Jess Shi; Jordi Parramon; Edgar Sánchez-Sinencio (IEEE Trans. Biomed. Circuits Syst., 2013)

Current-Reused 2.4-GHz Direct-Modulation Transmitter With On-Chip Automatic Tuning. - Hesam Amir Aslanzadeh; Erik John Pankratz; Chinmaya Mishra; Edgar Sánchez-Sinencio (IEEE Trans. Very Large Scale Integr. Syst., 2013)

An ultra-low power power management unit with -40dB switching-noise-suppression for a 3×3 thermoelectric generator array with 57% maximum end-to-end efficiency. - Jorge Zarate-Roldan; Salvador Carreon-Bautista; Alfredo Costilla-Reyes; Edgar Sánchez-Sinencio (CICC, 2014)

Smart nodes of internet of things (IoT): a hardware perspective view & implementation. - Edgar Sánchez-Sinencio (ACM Great Lakes Symposium on VLSI, 2014)

Reduced clock harmonic distortion technique in maximum tunable switched-R-MOSFET-C filters. - Arunvenkatesh Alagappan; Sergio Soto Aguilar; Edgar Sánchez-Sinencio (MWSCAS, 2014)

A switched mode Li-ion battery charger with multiple energy harvesting systems simultaneously used as input sources. - Judy M. Amanor-Boadu; Mohamed A. Abouzied; Salvador Carreon-Bautista; Roland Ribeiro; Xiaosen Liu; Edgar Sánchez-Sinencio (MWSCAS, 2014)

SmartShelter: A Sustainable power system design using energy harvesting techniques. - Leticia Ibarra; Benjamin Hilton; Mehna Nawal; Salvador Carreon-Bautista; Mohamed Abouzied; Xiaosen Liu; Roland Ribeiro; Judy Amanor-Badu; Ethan Miller; Jorge Vanegas; Edgar Sánchez-Sinencio (MWSCAS, 2014)

Welcome to MWSCAS 2014. - José Silva-Martínez; Edgar Sánchez-Sinencio; José G. Delgado-Frias; Randall L. Geiger (MWSCAS, 2014)

Survey of integrated-circuit-oscillator phase-noise analysis. - Erik Pankratz; Edgar Sánchez-Sinencio (Int. J. Circuit Theory Appl., 2014)

A Feed-Forward Power-Supply Noise Cancellation Technique for Single-Ended Class-D Audio Amplifiers. - Adrian Colli-Menchi; Joselyn Torres; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2014)

An Energy-Efficient Time-Domain Asynchronous 2 b/Step SAR ADC With a Hybrid R-2R/C-3C DAC Structure. - Jiayi Jin; Yang Gao; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2014)

Electromagnetic Interference Resisting Operational Amplifier. - Jingjing Yu; Ahmed Amer; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Boost Converter With Dynamic Input Impedance Matching for Energy Harvesting With Multi-Array Thermoelectric Generators. - Salvador Carreon-Bautista; Ahmed Eladawy; Ahmed Nader Mohieldin; Edgar Sánchez-Sinencio (IEEE Trans. Ind. Electron., 2014)

20.7 A 0.45-to-3V reconfigurable charge-pump energy harvester with two-dimensional MPPT for Internet of Things. - Xiaosen Liu; Edgar Sánchez-Sinencio (ISSCC, 2015)

Built-In Self Optimization for Variation Resilience of Analog Filters. - Jiafan Wang 002; Congyin Shi; Edgar Sánchez-Sinencio; Jiang Hu (ISVLSI, 2015)

Low power complementary metal-oxide semiconductor class-G audio amplifier with gradual power supply switching. - Bharadvaj Bhamidipati; Adrian Colli-Menchi; Edgar Sánchez-Sinencio (IET Circuits Devices Syst., 2015)

An 86% Efficiency 12 µW Self-Sustaining PV Energy Harvesting System With Hysteresis Regulation and Time-Domain MPPT for IOT Smart Nodes. - Xiaosen Liu; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2015)

A Home Sleep Apnea Screening Device With Time-Domain Signal Processing and Autonomous Scoring Capability. - Jiayi Jin; Edgar Sánchez-Sinencio (IEEE Trans. Biomed. Circuits Syst., 2015)

150-850 MHz High-Linearity Sine-wave Synthesizer Architecture Based on FIR Filter Approach and SFDR Optimization. - Congyin Shi; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

A Power Management Unit With 40 dB Switching-Noise-Suppression for a Thermal Harvesting Array. - Jorge Zarate-Roldan; Salvador Carreon-Bautista; Alfredo Costilla-Reyes; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

An Automatic Resonance Tracking Scheme With Maximum Power Transfer for Piezoelectric Transducers. - Xiaosen Liu; Adrian Colli-Menchi; James G. R. Gilbert; Daniel A. Friedrichs; Keith Malang; Edgar Sánchez-Sinencio (IEEE Trans. Ind. Electron., 2015)

A Highly Efficient Ultralow Photovoltaic Power Harvesting System With MPPT for Internet of Things Smart Nodes. - Xiaosen Liu; Edgar Sánchez-Sinencio (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Distributed on-chip regulation: theoretical stability foundation, over-design reduction and performance optimization. - Xin Zhan; Peng Li 001; Edgar Sánchez-Sinencio (DAC, 2016)

21.1 A single-cycle MPPT charge-pump energy harvester using a thyristor-based VCO without storage capacitor. - Xiaosen Liu; Edgar Sánchez-Sinencio (ISSCC, 2016)

An Autonomous Energy Harvesting Power Management Unit With Digital Regulation for IoT Applications. - Salvador Carreon-Bautista; Lilly Huang; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2016)

A Highly Efficient Reconfigurable Charge Pump Energy Harvester With Wide Harvesting Range and Two-Dimensional MPPT for Internet of Things. - Xiaosen Liu; Lilly Huang; Krishnan Ravichandran; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2016)

Introduction to the December Special Issue on the 2016 IEEE International Solid-State Circuits Conference. - Edgar Sánchez-Sinencio; Jan Mulder; Antonio Liscidini; Eric A. M. Klumperink; Elad Alon (IEEE J. Solid State Circuits, 2016)

A Capacitor-Less LDO With High-Frequency PSR Suitable for a Wide Range of On-Chip Capacitive Loads. - Jorge Zarate-Roldan; Mengde Wang; Joselyn Torres; Edgar Sánchez-Sinencio (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Analog filter design: Current design techniques and trends. - Edgar Sánchez-Sinencio (CICC, 2017)

Noise-sensitive feedback loop identification in linear time-varying analog circuits. - Ang Li 005; Peng Li 001; Tingwen Huang; Edgar Sánchez-Sinencio (DATE, 2017)

21.4 A reduced-order sliding-mode controller with an auxiliary PLL frequency discriminator for ultrasonic electric scalpels. - Xiaosen Liu; Adrian I. Colli-Menchi; Edgar Sánchez-Sinencio (ISSCC, 2017)

Session 22 overview: Harvesting and wireless power. - Stefano Stanzione; Edgar Sánchez-Sinencio; Axel Thomsen (ISSCC, 2017)

Thwarting analog IC piracy via combinational locking. - Jiafan Wang 002; Congyin Shi; Adriana C. Sanabria-Borbon; Edgar Sánchez-Sinencio; Jiang Hu (ITC, 2017)

Efficient use of gain-bandwidth product in active filters: Gm-C and Active-R alternatives. - Adriana C. Sanabria-Borbon; Edgar Sánchez-Sinencio (LASCAS, 2017)

A Fully Integrated Reconfigurable Self-Startup RF Energy-Harvesting System With Storage Capability. - Mohamed Abouzied; Krishnan Ravichandran; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2017)

On-Chip Two-Tone Synthesizer Based on a Mixing-FIR Architecture. - Congyin Shi; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2017)

A 0.8-1.2 V 10-50 MS/s 13-bit Subranging Pipelined-SAR ADC Using a Temperature-Insensitive Time-Based Amplifier. - Minglei Zhang; Kyoohyun Noh; Xiaohua Fan; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2017)

Ultrasonic Electric Scalpels Based on a Sliding-Mode Controller With an Auxiliary PLL Frequency Discriminator. - Xiaosen Liu; Adrian I. Colli-Menchi; Edgar Sánchez-Sinencio (IEEE Trans. Biomed. Circuits Syst., 2017)

An All-MOSFET Voltage Reference With -50-dB PSR at 80 MHz for Low-Power SoC Design. - Nashiru Alhassan; Zekun Zhou; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Guest Editorial Special Issue on Circuits and Systems for the Internet of Things - From Sensing to Sensemaking. - Massimo Alioto; Edgar Sánchez-Sinencio; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

An All-MOSFET Sub-1-V Voltage Reference With a - 51 -dB PSR up to 60 MHz. - Nashiru Alhassan; Zekun Zhou; Edgar Sánchez-Sinencio (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Technology Enabling Circuits and Systems for the Internet-of-Things: An Overview. - Johan J. Estrada-López; Amr Abuellil; Alfredo Costilla-Reyes; Edgar Sánchez-Sinencio (ISCAS, 2018)

Surrogate-based Optimization-aided Design for Low Power Analog Circuits. - Sergio Soto Aguilar; Adriana C. Sanabria-Borbon; Edgar Sánchez-Sinencio (MWSCAS, 2018)

A Time-Domain Digital-Intensive Built-In Tester for Analog Circuits. - Congyin Shi; Sanghoon Lee 008; Sergio Soto Aguilar; Edgar Sánchez-Sinencio (J. Electron. Test., 2018)

A Built-In Self-Test and In Situ Analog Circuit Optimization Platform. - Sanghoon Lee 008; Congyin Shi; Jiafan Wang 002; Adriana C. Sanabria-Borbon; Hatem Osman; Jiang Hu; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A Switched Capacitor Energy Harvester Based on a Single-Cycle Criterion for MPPT to Eliminate Storage Capacitor. - Xiaosen Liu; Krishnan Ravichandran; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

An Area Efficient Thermal Energy Harvester With Reconfigurable Capacitor Charge Pump for IoT Applications. - Sungjun Yoon; Salvador Carreon-Bautista; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

An Integrated Concurrent Multiple-Input Self-Startup Energy Harvesting Capacitive-Based DC Adder Combiner. - Mohamed Abouzied; Hatem Osman; Vaibhav A. Vaidya; Krishnan Ravichandran; Edgar Sánchez-Sinencio (IEEE Trans. Ind. Electron., 2018)

An Efficient and Fast Li-Ion Battery Charging System Using Energy Harvesting or Conventional Sources. - Judy M. Amanor-Boadu; Mohamed Abouzied; Edgar Sánchez-Sinencio (IEEE Trans. Ind. Electron., 2018)

Search for Optimal Pulse Charging Parameters for Li-Ion Polymer Batteries Using Taguchi Orthogonal Arrays. - Judy M. Amanor-Boadu; Anthony Guiseppi-Elie; Edgar Sánchez-Sinencio (IEEE Trans. Ind. Electron., 2018)

A 13.56-MHz CMOS Active Rectifier With a Voltage Mode Switched-Offset Comparator for Implantable Medical Devices. - Kyoohyun Noh; Judy M. Amanor-Boadu; Minglei Zhang; Edgar Sánchez-Sinencio (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Design Space Exploration of Distributed On-Chip Voltage Regulation Under Stability Constraint. - Xin Zhan; Joseph Riad; Peng Li 001; Edgar Sánchez-Sinencio (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Breaking Analog Locking Techniques via Satisfiability Modulo Theories. - Nithyashankari Gummidipoondi Jayasankaran; Adriana C. Sanabria-Borbon; Amr Abuellil; Edgar Sánchez-Sinencio; Jiang Hu; Jeyavijayan Rajendran (ITC, 2019)

Design of Sub-Gigahertz Reconfigurable RF Energy Harvester From -22 to 4 dBm With 99.8% Peak MPPT Power Efficiency. - Zizhen Zeng; Shanpu Shen; Xiaopeng Zhong; Xing Li 004; Chi-Ying Tsui; Amine Bermak; Ross D. Murch; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2019)

Taming the Stability-Constrained Performance Optimization Challenge of Distributed On-Chip Voltage Regulation. - Xin Zhan; Peng Li 001; Edgar Sánchez-Sinencio (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Reconfigurable System for Electromagnetic Energy Harvesting With Inherent Activity Sensing Capabilities for Wearable Technology. - Alfredo Costilla-Reyes; Amr Abuellil; Johan J. Estrada-López; Salvador Carreon-Bautista; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

A Unified Amplifier-Based CC-CV Linear Charger for Energy-Constrained Low-Power Applications. - Kyoohyun Noh; Minglei Zhang; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

An On-Chip Built-in Linearity Estimation Methodology and Hardware Implementation. - Congyin Shi; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Highly Linear Low-Power Wireless RF Receiver for WSN. - Omar Elsayed; Jorge Zarate-Roldan; Amr Abuellil; Faisal Abdel-Latif Hussien; Ahmed Eladawy; Edgar Sánchez-Sinencio (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Power Management for Multicore Processors via Heterogeneous Voltage Regulation and Machine Learning Enabled Adaptation. - Xin Zhan; Jianhao Chen; Edgar Sánchez-Sinencio; Peng Li 001 (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Dynamic Heterogeneous Voltage Regulation for Systolic Array-Based DNN Accelerators. - Jianhao Chen; Joseph Riad; Edgar Sánchez-Sinencio; Peng Li 001 (ICCD, 2020)

A Harmonic-Canceling Synthesizer using Skew-Circulant-Matrix-Based Coefficient Generator. - Guillermo G. Garayar-Leyva; Hatem Osman; Johan J. Estrada-López; Edgar Sánchez-Sinencio (ISCAS, 2020)

Variation-Aware Heterogeneous Voltage Regulation for Multi-Core Systems-on-a-Chip with On-Chip Machine Learning. - Joseph Riad; Jianhao Chen; Edgar Sánchez-Sinencio; Peng Li 001 (ISQED, 2020)

Schmitt Trigger-Based Key Provisioning for Locking Analog/RF Integrated Circuits. - Adriana C. Sanabria-Borbon; Nithyashankari Gummidipoondi Jayasankaran; S. Y. Lee; Edgar Sánchez-Sinencio; Jiang Hu; Jeyavijayan (JV) Rajendran (ITC, 2020)

Wien Oscillator Using Organic Enzyme-Chemiresistors for Fused Measurement of Glucose and Lactate. - John R. Aggas; Edgar Sánchez-Sinencio; Anthony Guiseppi-Elie (Adv. Intell. Syst., 2020)

A 1-nA 4.5-nW 289-ppm/°C Current Reference Using Automatic Calibration. - Sanghoon Lee 008; Stephen K. Heinrich-Barna; Kyoohyun Noh; Keith Kunz; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 2020)

A PVT-Resilient, Highly-Linear Fifth-Order Ring-Oscillator-Based Filter. - Hatem Osman; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst., 2020)

Power-Scaling Output-Compensated Three-Stage OTAs for Wide Load Range Applications. - Joseph Riad; Johan J. Estrada-López; Ivan R. Padilla-Cantoya; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

A Reconfigurable Rectifier With Optimal Loading Point Determination for RF Energy Harvesting From -22 dBm to -2 dBm. - Zizhen Zeng; Johan J. Estrada-López; Mohamed Abouzied; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A Stabilizing Centralized Controller for On-Chip Power Delivery Networks. - Joseph Riad; Peng Li 001; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

Multiple-Input Harvesting Power Management Unit With Enhanced Boosting Scheme for IoT Applications. - Amr Abuellil; Johan J. Estrada-López; Aditya Bommireddipalli; Alfredo Costilla-Reyes; Zizhen Zeng; Edgar Sánchez-Sinencio (IEEE Trans. Ind. Electron., 2020)

A Fully Integrated Maximum Power Tracking Combiner for Energy Harvesting IoT Applications. - Johan J. Estrada-López; Amr Abuellil; Alfredo Costilla-Reyes; Mohamed Abouzied; Sungjun Yoon; Edgar Sánchez-Sinencio (IEEE Trans. Ind. Electron., 2020)

A 175.2-mW 4-Stage OTA With Wide Load Range (400 pF-12 nF) Using Active Parallel Compensation. - Samuel Annor Fordjour; Joseph Riad; Edgar Sánchez-Sinencio (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Breaking Analog Locking Techniques. - Nithyashankari Gummidipoondi Jayasankaran; Adriana C. Sanabria-Borbon; Amr Abuellil; Edgar Sánchez-Sinencio; Jiang Hu; Jeyavijayan Rajendran (IEEE Trans. Very Large Scale Integr. Syst., 2020)

A 0.6-V Power-Efficient Active-RC Analog Low-Pass Filter With Cutoff Frequency Selection. - Fernando Lavalle-Aviles; Edgar Sánchez-Sinencio (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Synthesis of High-Order Continuously Tunable Low-Pass Active-R Filters. - Adriana C. Sanabria-Borbon; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A CMOS Energy Harvesting Interface Circuit With Cycle-to-Cycle Frequency-to-Amplitude Conversion MPPT for Centimeter-Scale Wind Turbine. - Zizhen Zeng; Johan J. Estrada-López; Bo Wang 012; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Current Reference Circuits: A Tutorial. - Sanghoon Lee 008; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Analog/RF IP Protection: Attack Models, Defense Techniques, and Challenges. - Adriana C. Sanabria-Borbon; Nithyashankari Gummidipoondi Jayasankaran; Jiang Hu; Jeyavijayan Rajendran; Edgar Sánchez-Sinencio (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Towards Provably-Secure Analog and Mixed-Signal Locking Against Overproduction. - Nithyashankari Gummidipoondi Jayasankaran; Adriana C. Sanabria-Borbon; Edgar Sánchez-Sinencio; Jiang Hu; Jeyavijayan Rajendran (IEEE Trans. Emerg. Top. Comput., 2022)