Physical Design Considerations of One-level RRAM-based Routing Multiplexers. - Xifan Tang; Edouard Giacomin; Giovanni De Micheli; Pierre-Emmanuel Gaillardon (ISPD, 2017)

Low-power multiplexer designs using three-independent-gate field effect transistors. - Edouard Giacomin; Jorge Romero Gonzalez; Pierre-Emmanuel Gaillardon (NANOARCH, 2017)

Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure. - Xifan Tang; Edouard Giacomin; Giovanni De Micheli; Pierre-Emmanuel Gaillardon (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Differential Power Analysis Mitigation Technique Using Three-Independent-Gate Field Effect Transistors. - Edouard Giacomin; Pierre-Emmanuel Gaillardon (VLSI-SoC, 2018)

Post-P&R Performance and Power Analysis for RRAM-Based FPGAs. - Xifan Tang; Edouard Giacomin; Giovanni De Micheli; Pierre-Emmanuel Gaillardon (IEEE J. Emerg. Sel. Topics Circuits Syst., 2018)

OpenFPGA: An Opensource Framework Enabling Rapid Prototyping of Customizable FPGAs. - Xifan Tang; Edouard Giacomin; Aurélien Alacchi; Baudouin Chauviere; Pierre-Emmanuel Gaillardon (FPL, 2019)

A Study on Switch Block Patterns for Tileable FPGA Routing Architectures. - Xifan Tang; Edouard Giacomin; Aurélien Alacchi; Pierre-Emmanuel Gaillardon (FPT, 2019)

Wire-Aware Architecture and Dataflow for CNN Accelerators. - Sumanth Gudaparthi; Surya Narayanan; Rajeev Balasubramonian; Edouard Giacomin; Hari Kambalasubramanyam; Pierre-Emmanuel Gaillardon (MICRO, 2019)

GenCache: Leveraging In-Cache Operators for Efficient Sequence Alignment. - Anirban Nag; C. N. Ramachandra; Rajeev Balasubramonian; Ryan Stutsman; Edouard Giacomin; Hari Kambalasubramanyam; Pierre-Emmanuel Gaillardon (MICRO, 2019)

A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors. - Ganesh Gore; Patsy Cadareanu; Edouard Giacomin; Pierre-Emmanuel Gaillardon (VLSI-SoC, 2019)

A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories. - João Vieira; Edouard Giacomin; Yasir Mahmood Qureshi; Marina Zapater; Xifan Tang; Shahar Kvatinsky; David Atienza; Pierre-Emmanuel Gaillardon (VLSI-SoC, 2019)

Accelerating Inference on Binary Neural Networks with Digital RRAM Processing. - João Vieira; Edouard Giacomin; Yasir Mahmood Qureshi; Marina Zapater; Xifan Tang; Shahar Kvatinsky; David Atienza; Pierre-Emmanuel Gaillardon (VLSI-SoC (Selected Papers), 2019)

A Robust Digital RRAM-Based Convolutional Block for Low-Power Image Processing and Learning Applications. - Edouard Giacomin; Tzofnat Greenberg-Toledo; Shahar Kvatinsky; Pierre-Emmanuel Gaillardon (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs. - Xifan Tang; Edouard Giacomin; Giovanni De Micheli; Pierre-Emmanuel Gaillardon (IEEE Trans. Very Large Scale Integr. Syst., 2019)

A RRAM-based FPGA for Energy-efficient Edge Computing. - Xifan Tang; Edouard Giacomin; Patsy Cadareanu; Ganesh Gore; Pierre-Emmanuel Gaillardon (DATE, 2020)

SpinalFlow: An Architecture and Dataflow Tailored for Spiking Neural Networks. - Surya Narayanan; Karl Taht; Rajeev Balasubramonian; Edouard Giacomin; Pierre-Emmanuel Gaillardon (ISCA, 2020)

Layout Considerations of Logic Designs Using an N-layer 3D Nanofabric Process Flow. - Edouard Giacomin; Jürgen Bömmels; Julien Ryckaert; Francky Catthoor; Pierre-Emmanuel Gaillardon (VLSI-SOC, 2020)

3D Nanofabric: Layout Challenges and Solutions for Ultra-scaled Logic Designs. - Edouard Giacomin; Jürgen Bömmels; Julien Ryckaert; Francky Catthoor; Pierre-Emmanuel Gaillardon (VLSI-SoC (Selected Papers), 2020)

OpenFPGA: An Open-Source Framework for Agile Prototyping Customizable FPGAs. - Xifan Tang; Edouard Giacomin; Baudouin Chauviere; Aurélien Alacchi; Pierre-Emmanuel Gaillardon (IEEE Micro, 2020)

Smart-Redundancy: An Alternative SEU/SET Mitigation Method for FPGAs. - Aurélien Alacchi; Edouard Giacomin; Xifan Tang; Pierre-Emmanuel Gaillardon (ISCAS, 2021)

Area-Efficient Multiplier Designs Using a 3D Nanofabric Process Flow. - Edouard Giacomin; Francky Catthoor; Pierre-Emmanuel Gaillardon (ISCAS, 2021)

A Novel High-Gain Amplifier Circuit Using Super-Steep-Subthreshold-Slope Field-Effect Transistors. - Matthieu Couriol; Patsy Cadareanu; Edouard Giacomin; Pierre-Emmanuel Gaillardon (VLSI-SoC, 2021)

A First Approach in Using Super-Steep-Subthreshold-Slope Field-Effect Transistors in Ultra-Low Power Analog Design. - Matthieu Couriol; Patsy Cadareanu; Edouard Giacomin; Pierre-Emmanuel Gaillardon (VLSI-SoC (Selected Papers), 2021)

A 12-pA Resolution Sigma Delta ADC Topology for Chemiresistive Sensor-Based Applications. - Matthieu Couriol; Edouard Giacomin; Pierre-Emmanuel Gaillardon (VLSI-SoC, 2021)

Low Latency SEU Detection in FPGA CRAM With In-Memory ECC Checking. - Aurélien Alacchi; Edouard Giacomin; Scott Temple; Roman Gauchi; Michael J. Wirthlin; Pierre-Emmanuel Gaillardon (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

3D SRAM Macro Design in 3D Nanofabric Process Technology. - Dawit Burusie Abdi; Shairfe Muhammad Salahuddin; Jürgen Bömmels; Edouard Giacomin; Pieter Weckx; Julien Ryckaert; Geert Hellings; Francky Catthoor (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Smart-Redundancy With In Memory ECC Checking: Low-Power SEE-Resistant FPGA Architectures. - Aurélien Alacchi; Edouard Giacomin; Roman Gauchi; Szymon Kulis; Pierre-Emmanuel Gaillardon (IEEE Trans. Very Large Scale Integr. Syst., 2023)