Joint time, frequency and sampling clock synchronization for OFDM-based systems. - Eduardo del Castillo-Sánchez; Francisco Javier López-Martínez; Eduardo Martos-Naya; José T. Entrambasaguas (WCNC, 2009)

Iterative-Gradient Based Complex Divider FPGA Core with Dynamic Configurability of Accuracy and Throughput. - Francisco Javier López-Martínez; Eduardo del Castillo-Sánchez; José T. Entrambasaguas; Eduardo Martos-Naya (J. Signal Process. Syst., 2011)

Performance evaluation of preamble detectors for 3GPP-LTE physical random access channel. - Francisco Javier López-Martínez; Eduardo del Castillo-Sánchez; Eduardo Martos-Naya; José T. Entrambasaguas (Digit. Signal Process., 2012)