Some Notes on Power Management on FPGA-Based Systems. - Eduardo I. Boemo; Guillermo González de Rivera; Sergio López-Buedo; Juan M. Meneses (FPL, 1995)

The Wave Pipeline Effect on LUT-Based FPGA Architectures. - Eduardo I. Boemo; Sergio López-Buedo; Juan M. Meneses (FPGA, 1996)

Thermal monitoring on FPGAs using ring-oscillators. - Eduardo I. Boemo; Sergio López-Buedo (FPL, 1997)

Design and FPGA implementation of digit-serial FIR filters. - Javier Valls; Marcos M. Peiró; Trinidad Sansaloni; Eduardo I. Boemo (ICECS, 1998)

Some experiments about wave pipelining on FPGA's. - Eduardo I. Boemo; Sergio López-Buedo; Juan M. Meneses (IEEE Trans. Very Large Scale Integr. Syst., 1998)

A comparison between lattice, cascade and direct form FIR filter structures by using a FPGA bit-serial distributed arithmetic implementation. - Marcos Martínez-Peiró; Javier Valls; T. Sansaloni; A. Perez-Pascual; Eduardo I. Boemo (ICECS, 1999)

Fast FPGA-based pipelined digit-serial/parallel multipliers. - Javier Valls; Trini Sansaloni; Marcos Martínez-Peiró; Eduardo I. Boemo (ISCAS (1), 1999)

Thermal Testing on Reconfigurable Computers. - Sergio López-Buedo; Javier Garrido Salas; Eduardo I. Boemo (IEEE Des. Test Comput., 2000)

Run-Time Reconfiguration to Check Temperature in Custom Computers: An Application of JBits Technology. - Sergio López-Buedo; Paula Riviere; Pablo Pernas; Eduardo I. Boemo (FPL, 2002)

FSM Decomposition for Low Power in FPGA. - Gustavo Sutter; Elias Todorovich; Sergio López-Buedo; Eduardo I. Boemo (FPL, 2002)

A Tool for Activity Estimation in FPGAs. - Elias Todorovich; M. Gilabert; Gustavo Sutter; Sergio López-Buedo; Eduardo I. Boemo (FPL, 2002)

Low-Power FSMs in FPGA: Encoding Alternatives. - Gustavo Sutter; Elias Todorovich; Sergio López-Buedo; Eduardo I. Boemo (PATMOS, 2002)

Efficient FPGA-implementation of two's complement digit-serial/parallel multipliers. - Javier Valls; Eduardo I. Boemo (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

Making visible the thermal behaviour of embedded microprocessors on FPGAs: a progress report. - Sergio López-Buedo; Eduardo I. Boemo (FPGA, 2004)

Power analysis and estimation tool integrated with XPOWER. - Elias Todorovich; Eduardo I. Boemo; Francisco Cardells-Tormo; Javier Valls (FPGA, 2004)

Power Aware Dividers in FPGA. - Gustavo Sutter; Jean-Pierre Deschamps; Gery Bioul; Eduardo I. Boemo (PATMOS, 2004)

Digital Signal Transmission with Chaotic Encryption: Design and Evaluation of a FPGA Realization - C. M. Gonzalez; Hilda A. Larrondo; C. A. Gayoso; Leonardo J. Arnone; Eduardo I. Boemo (CoRR, 2004)

Motion of Minimal Configurations of a Modular Robot: Sinusoidal, Lateral Rolling and Lateral Shift. - J. Gonzalez-Gomez; Eduardo I. Boemo (CLAWAR, 2005)

Statistical Power Estimation for FPGA. - Elias Todorovich; Fabian Angarita; Javier Valls; Eduardo I. Boemo (FPL, 2005)

Rapid prototyping of a self-timed ALU with FPGAs. - Susana Ortega-Cisneros; Juan José Raygoza-Panduro; Juan Suardíaz Muro; Eduardo I. Boemo (ReConFig, 2005)

FPGA implementation of a synchronous and self-timed neuroprocessor. - Juan José Raygoza-Panduro; Susana Ortega-Cisneros; Eduardo I. Boemo (ReConFig, 2005)

Evaluation of a Locomotion Algorithm for Worm-Like Robots on FPGA-Embedded Processors. - J. Gonzalez-Gomez; Iván González 004; Francisco J. Gomez-Arribas; Eduardo I. Boemo (ARC, 2006)

A-B Nodes Classification for Power Estimation. - Elias Todorovich; Eduardo I. Boemo (FPL, 2006)

Editorial - Field-programmable logic and applications. - Philip Heng Wai Leong; Andreas Koch 001; Eduardo I. Boemo (IET Comput. Digit. Tech., 2007)

Arithmetic Operations and Their Energy Consumption in the Nios II Embedded Processor. - David M. Cambre; Eduardo I. Boemo; Elias Todorovich (ReConFig, 2008)

Tracking the pipelining-power rule along the FPGA technical literature. - Eduardo I. Boemo; Juan P. Oliver; Gabriel Caffarena (FPGAworld, 2013)

Self-Reconfigurable Constant Multiplier for FPGA. - Javier Hormigo; Gabriel Caffarena; Juan P. Oliver; Eduardo I. Boemo (ACM Trans. Reconfigurable Technol. Syst., 2013)

A Low Cost System for Self Measurements of Power Consumption in Field Programmable Gate Arrays. - Juan P. Oliver; Francisco Veirano; Diego A. Bouvier; Eduardo I. Boemo (J. Low Power Electron., 2017)

A Framework to Compare Estimated and Measured Power Consumption on FPGAs. - Juan P. Oliver; Federico Favaro; Eduardo I. Boemo (J. Low Power Electron., 2019)

Real-Time Reconfigurable Processor to Detect Similarities in Compressed Video Using Generalized Hough Transformation. - Sergio Ruben Geninatti; Eduardo I. Boemo (IEEE Trans. Circuits Syst. Video Technol., 2020)