Introducing SW-Based Fault Handling Mechanisms to Cope with EMI in Embedded Electronics: Are They A Good Remedy? - Fabian Vargas 001; Diogo B. Brum; Dárcio Prestes; Letícia Maria Veiras Bolzani; Eduardo Luis Rhod; Matteo Sonza Reorda (IOLTS, 2003)

Merging a DSP-Oriented Signal Integrity Technique and SW-Based Fault Handling Mechanisms to Ensure Reliable DSP Systems. - Fabian Vargas 001; Rubem Dutra Ribeiro Fagundes; Daniel Barros Jr.; Diogo B. Brum; Eduardo Luis Rhod (J. Electron. Test., 2004)

Using Memory to Cope with Simultaneous Transient Faults. - Eduardo Luis Rhod; Carlos Arthur Lang Lisbôa; Luigi Carro (LATW, 2006)

A low-SER efficient core processor architecture for future technologies. - Eduardo Luis Rhod; Carlos Arthur Lang Lisbôa; Luigi Carro (DATE, 2007)

Binary translation process to optimize nanowire arrays usage. - Eduardo Luis Rhod; Mateus B. Rutzig; Luigi Carro (ISCAS, 2008)

An efficient test and characterization approach for nanowire-based architectures. - Eduardo Luis Rhod; Luigi Carro (SBCCI, 2008)

Hardware and Software Transparency in the Protection of Programs Against SEUs and SETs. - Eduardo Luis Rhod; Carlos Arthur Lang Lisbôa; Luigi Carro; Matteo Sonza Reorda; Massimo Violante (J. Electron. Test., 2008)

A new RC design for mixed-grain based dynamically reconfigurable architectures. - Eduardo Luis Rhod; Luca Sterpone; Luigi Carro (ICECS, 2009)

A Low Cost Low Power Quaternary LUT Cell for Fault Tolerant Applications in Future Technologies. - Eduardo Luis Rhod; Luigi Carro (ISVLSI, 2009)

A New Soft-Error Resilient Voltage-Mode Quaternary Latch. - Eduardo Luis Rhod; Luca Sterpone; Luigi Carro (DFT, 2010)

A new structure of UHF RFID tag antenna mountable on metallic surface using double slits. - Juliana Borges Ferreira; Álvaro Augusto Almeida de Salles; Giovani Bulla; Eduardo Luis Rhod (LATINCOM, 2017)