A Survey of the Graphic Alternate Method for Boolean Functions Simplification. - Eduardo Romero-Aguirre; Juan Carlos Murrieta-Lee (CONIELECOMP, 2005)

A Hardware-Efficient Frequency Domain Correlator Architecture for Acquisition Stage in GPS. - Eduardo Romero-Aguirre; Ramón Parra-Michel; Omar Humberto Longoria-Gandara; M. Aguirre-Hernandez (ReConFig, 2010)

Architecture Based on Array Processors for Data-Dependent Superimposed Training Channel Estimation. - Eduardo Romero-Aguirre; Ramón Parra-Michel; Roberto Carrasco-Alvarez; Aldo G. Orozco-Lugo (ReConFig, 2011)

Full-hardware architectures for data-dependent superimposed training channel estimation. - Eduardo Romero-Aguirre; Ramón Parra-Michel; Aldo G. Orozco-Lugo; Roberto Carrasco-Alvarez (SiPS, 2011)

Configurable Transmitter and Systolic Channel Estimator Architectures for Data-Dependent Superimposed Training Communications Systems. - Eduardo Romero-Aguirre; Ramón Parra-Michel; Roberto Carrasco-Alvarez; Aldo G. Orozco-Lugo (Int. J. Reconfigurable Comput., 2012)

A SDR architecture based on FPGA for multi-standard transmitter. - B. Bautista-Contreras; Ramón Parra-Michel; Roberto Carrasco-Alvarez; Eduardo Romero-Aguirre (GlobalSIP, 2013)

Full-Hardware Architectures for Data-Dependent Superimposed Training Channel Estimation. - Eduardo Romero-Aguirre; Roberto Carrasco-Alvarez; Ramón Parra-Michel; Aldo G. Orozco-Lugo; Antonio F. Mondragón-Torres (J. Signal Process. Syst., 2013)

Reconfigurable architecture based on FPGA for OFDM transmitter. - L. Orozco-Galvan; Ramón Parra-Michel; Eduardo Romero-Aguirre (LATINCOM, 2015)

Iterative MIMO Detection and Channel Estimation Using Joint Superimposed and Pilot-Aided Training. - Omar Longoria-Gandara; Ramón Parra-Michel; Roberto Carrasco-Alvarez; Eduardo Romero-Aguirre (Mob. Inf. Syst., 2016)

A resource efficient symbol synchronizer implementation for the IEEE 802.11 protocol. - L. Orozco-Galvan; Ramón Parra-Michel; Fernando Peña-Campos; Rodrigo Jaramillo-Ramirez; Eduardo Romero-Aguirre (LASCAS, 2018)