MOSFET technology for low-voltage/low-power applications. - Daniel Foty; Edward J. Nowak (IEEE Micro, 1994)

Reduced-voltage power/performance optimization of the 3.6-volt PowerPC 601 Microprocessor. - Kerry Bernstein; John E. Bertsch; Lawrence G. Heller; Edward J. Nowak; Francis R. White (IBM J. Res. Dev., 1995)

Overview of gate linewidth control in the manufacture of CMOS logic chips. - Donald G. Chesebro; James W. Adkisson; Lyman R. Clark; Steven N. Eslinger; Margaret A. Faucher; Steven J. Holmes; Raymond P. Mallette; Edward J. Nowak; Edward W. Sengle; Steven H. Voldman; Thomas W. Weeks (IBM J. Res. Dev., 1995)

A half-micron CMOS logic generation. - Charles W. Koburger III; William F. Clark; James W. Adkisson; Eric Adler; Paul E. Bakeman; Albert S. Bergendahl; Alan B. Botula; W. Chang; Bijan Davari; John H. Givens; Howard H. Hansen; Steven J. Holmes; et al. (IBM J. Res. Dev., 1995)

CMOS scaling into the 21st century: 0.1 µm and beyond. - Yuan Taur; Yuh-Jier Mii; David J. Frank; H.-S. Philip Wong; Douglas A. Buchanan; Shalom J. Wind; Stephen A. Rishton; Watson A. Sai-Halasz; Edward J. Nowak (IBM J. Res. Dev., 1995)

Practical performance/power alternatives within an existing CMOS technology generation. - Kerry Bernstein; John E. Bertsch; William F. Clark; John J. Ellis-Monaghan; Larry G. Heller; Edward J. Nowak (ISLPED, 1996)

Device scaling limits of Si MOSFETs and their application dependencies. - David J. Frank; Robert H. Dennard; Edward J. Nowak; Paul M. Solomon; Yuan Taur; Hon-Sum Philip Wong (Proc. IEEE, 2001)

High Performance Double-Gate Device Technology Challenges and Opportunities (invited). - Meikei Leong; H.-S. Philip Wong; Edward J. Nowak; Jakub Kedzierski; Erin C. Jones (ISQED, 2002)

Maintaining the benefits of CMOS scaling when scaling bogs down. - Edward J. Nowak (IBM J. Res. Dev., 2002)

CMOS scaling beyond the 100-nm node with silicon-dioxide-based gate dielectrics. - Ernest Y. Wu; Edward J. Nowak; Alex Vayshenker; Wing L. Lai; David L. Harmon (IBM J. Res. Dev., 2002)

Scaling beyond the 65 nm node with FinFET-DGCMOS. - Edward J. Nowak; Thomas Ludwig 004; Ingo Aller; Jakub Kedzierski; M. Leong; BethAnn Rainey; Matthew J. Breitwisch; V. Gemhoefer; Joachim Keinert; David M. Fried (CICC, 2003)

Critical reliability challenges in scaling SiO2-based dielectric to its limit. - Ernest Y. Wu; Jordi Suñé; Wing L. Lai; Alex Vayshenker; Edward J. Nowak; David L. Harmon (Microelectron. Reliab., 2003)

Status and Direction of Communication Technologies - SiGe BiCMOS and RFCMOS. - Alvin J. Joseph; David L. Harame; Basanth Jagannathan; Douglas D. Coolbaugh; David C. Ahlgren; John Magerlein; Louis D. Lanzerotti; Natalie B. Feilchenfeld; Stephen A. St. Onge; James S. Dunn; Edward J. Nowak (Proc. IEEE, 2005)

High-performance CMOS variability in the 65-nm regime and beyond. - Kerry Bernstein; David J. Frank; Anne E. Gattiker; Wilfried Haensch; Brian L. Ji; Sani R. Nassif; Edward J. Nowak; Dale J. Pearson; Norman J. Rohrer (IBM J. Res. Dev., 2006)

Silicon CMOS devices beyond scaling. - Wilfried Haensch; Edward J. Nowak; Robert H. Dennard; Paul M. Solomon; Andres Bryant; Omer H. Dokumaci; Arvind Kumar; Xinlin Wang; Jeffrey B. Johnson; Massimo V. Fischetti (IBM J. Res. Dev., 2006)

Ultralow-voltage, minimum-energy CMOS. - Scott Hanson; Bo Zhai; Kerry Bernstein; David T. Blaauw; Andres Bryant; Leland Chang; Koushik K. Das; Wilfried Haensch; Edward J. Nowak; Dennis Sylvester (IBM J. Res. Dev., 2006)

A High-Performance, Low Leakage, and Stable SRAM Row-Based Back-Gate Biasing Scheme in FinFET Technology. - Rajiv V. Joshi; Keunwoo Kim; Richard Q. Williams; Edward J. Nowak; Ching-Te Chuang (VLSI Design, 2007)

Compact modeling and simulation of PD-SOI MOSFETs: Current status and challenges. - Jung-Suk Goo; Richard Q. Williams; Glenn O. Workman; Qiang Chen; Sungjae Lee; Edward J. Nowak (CICC, 2008)

Effective Drive Current in Scaled FinFET and NSFET CMOS Inverters. - Ali Razavieh; Y. Deng; Peter Zeitzoff; M. R. Na; J. Frougier; Gauri Karve; D. E. Brown; T. Yamashita; Edward J. Nowak (DRC, 2018)

A Retrospective View on the Technology Evolution to Support Low Power Mobile Application. - Bipul C. Paul; Ajey P. Jacob; William Taylor; Randy W. Mann; Joseph Versaggi; Edward J. Nowak; Lars W. Liebmann (J. Low Power Electron., 2018)