DSP architectures: past, present and futures. - Edwin J. Tan; Wendi Beth Heinzelman (SIGARCH Comput. Archit. News, 2003)

Exploiting Coarse-Grain Verification Parallelism for Power-Efficient Fault Tolerance. - M. Wasiur Rashid; Edwin J. Tan; Michael C. Huang 001; David H. Albonesi (IEEE PACT, 2005)

QUILT: a GUI-based integrated circuit floorplanning environment for computer architecture research and education. - Gregory J. Briggs; Edwin J. Tan; Nicholas A. Nelson; David H. Albonesi (WCAE@ISCA, 2005)

Power-Efficient Error Tolerance in Chip Multiprocessors. - M. Wasiur Rashid; Edwin J. Tan; Michael C. Huang 001; David H. Albonesi (IEEE Micro, 2005)

A CMOS Image Sensor with Focal Plane Discrete Cosine Transform Computation. - Edwin J. Tan; Zeljko Ignjatovic; Mark F. Bocko (ISCAS, 2007)