Interactive presentation: Low cost debug architecture using lossy compression for silicon debug. - Ehab Anis; Nicola Nicolici (DATE, 2007)

On using lossless compression of debug data in embedded logic analysis. - Ehab Anis; Nicola Nicolici (ITC, 2007)

On Bypassing Blocking Bugs during Post-Silicon Validation. - Ehab Anis Daoud; Nicola Nicolici (ETS, 2008)

Real-Time Lossless Compression for Silicon Debug. - Ehab Anis Daoud; Nicola Nicolici (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

On Using Lossy Compression for Repeatable Experiments during Silicon Debug. - Ehab Anis Daoud; Nicola Nicolici (IEEE Trans. Computers, 2011)

Embedded Debug Architecture for Bypassing Blocking Bugs During Post-Silicon Validation. - Ehab Anis Daoud; Nicola Nicolici (IEEE Trans. Very Large Scale Integr. Syst., 2011)