ISECAD: an iterative simulation-equation-based opamp-design CAD tool. - Tahereh Kahookar Toosi; Ehsan Zhian Tabasy; Hassan Sarbishaei; Reza Lotfi (ISCAS, 2006)

A 6b 1.6GS/s ADC with redundant cycle 1-tap embedded DFE in 90nm CMOS. - Ehsan Zhian Tabasy; Ayman Shafik; S. Huang; N. Yang; Sebastian Hoyos; Samuel Palermo (CICC, 2012)

A ring-resonator-based silicon photonics transceiver with bias-based wavelength stabilization and adaptive-power-sensitivity receiver. - Cheng Li; Rui Bai 001; Ayman Shafik; Ehsan Zhian Tabasy; Geng Tang; Chao Ma 020; Chin-Hui Chen; Zhen Peng; Marco Fiorentino; Patrick Chiang 001; Samuel Palermo (ISSCC, 2013)

A 6-b 1.6-GS/s ADC With Redundant Cycle One-Tap Embedded DFE in 90-nm CMOS. - Ehsan Zhian Tabasy; Ayman Shafik; Shan Huang; Noah Hae-Woong Yang; Sebastian Hoyos; Samuel Palermo (IEEE J. Solid State Circuits, 2013)

Sequential Correlated Level Shifting: A Switched-Capacitor Approach for High-Accuracy Systems. - Ehsan Zhian Tabasy; Mahmoud Kamarei; Shahin Jafarabadi-Ashtiani; Samuel Palermo (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

Silicon Photonic Transceiver Circuits With Microring Resonator Bias-Based Wavelength Stabilization in 65 nm CMOS. - Cheng Li; Rui Bai 001; Ayman Shafik; Ehsan Zhian Tabasy; Binhao Wang; Geng Tang; Chao Ma 020; Chin-Hui Chen; Zhen Peng; Marco Fiorentino; Raymond G. Beausoleil; Patrick Chiang 001; et al. (IEEE J. Solid State Circuits, 2014)

A 6 bit 10 GS/s TI-SAR ADC With Low-Overhead Embedded FFE/DFE Equalization for Wireline Receiver Applications. - Ehsan Zhian Tabasy; Ayman Shafik; Keytaek Lee; Sebastian Hoyos; Samuel Palermo (IEEE J. Solid State Circuits, 2014)

3.6 A 10Gb/s hybrid ADC-based receiver with embedded 3-tap analog FFE and dynamically-enabled digital equalization in 65nm CMOS. - Ayman Shafik; Ehsan Zhian Tabasy; Shengchang Cai; Keytaek Lee; Sebastian Hoyos; Samuel Palermo (ISSCC, 2015)

Adaptively-tunable RF photonic filters. - Shengchang Cai; Gihoon Choo; Ehsan Zhian Tabasy; Binhao Wang; Kamran Entesari; Samuel Palermo (MWSCAS, 2015)

A 25GS/s 6b TI binary search ADC with soft-decision selection in 65nm CMOS. - Shengchang Cai; Ehsan Zhian Tabasy; Ayman Shafik; Shiva Kiran; Sebastian Hoyos; Samuel Palermo (VLSIC, 2015)

CMOS ADC-based receivers for high-speed electrical and optical links. - Samuel Palermo; Sebastian Hoyos; Ayman Shafik; Ehsan Zhian Tabasy; Shengchang Cai; Shiva Kiran; Keytaek Lee (IEEE Commun. Mag., 2016)

A 10 Gb/s Hybrid ADC-Based Receiver With Embedded Analog and Per-Symbol Dynamically Enabled Digital Equalization. - Ayman Shafik; Ehsan Zhian Tabasy; Shengchang Cai; Keytaek Lee; Sebastian Hoyos; Samuel Palermo (IEEE J. Solid State Circuits, 2016)

A 25 GS/s 6b TI Two-Stage Multi-Bit Search ADC With Soft-Decision Selection Algorithm in 65 nm CMOS. - Shengchang Cai; Ehsan Zhian Tabasy; Ayman Shafik; Shiva Kiran; Sebastian Hoyos; Samuel Palermo (IEEE J. Solid State Circuits, 2017)