A 250-MHz single-chip multiprocessor for audio and video signal processing. - Tatsuya Koyama; Keisuke Inoue; Hirokazu Hanaki; Masahiro Yasue; Eiji Iwata (IEEE J. Solid State Circuits, 2001)

The microarchitecture of the synergistic processor for a cell processor. - Brian K. Flachs; Shigehiro Asano; Sang H. Dhong; H. Peter Hofstee; Gilles Gervais; Roy Kim; Tien Le; Peichun Liu; Jens Leenstra; John S. Liberty; Brad W. Michael; Hwa-Joon Oh; et al. (IEEE J. Solid State Circuits, 2006)

Cell Broadband Engine Architecture and its first implementation - A performance view. - Thomas Chen; Ram Raghavan; Jason N. Dale; Eiji Iwata (IBM J. Res. Dev., 2007)

Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI. - Brian K. Flachs; Shigehiro Asano; Sang H. Dhong; H. Peter Hofstee; Gilles Gervais; Roy Kim; Tien Le; Peichun Liu; Jens Leenstra; John S. Liberty; Brad W. Michael; Hwa-Joon Oh; et al. (IBM J. Res. Dev., 2007)

Development of a new self-assembled die bonder to three-dimensionally stack known good dies in batch. - Takafumi Fukushima; Eiji Iwata; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2009)

Evaluation of alignment accuracy on chip-to-wafer self-assembly and mechanism on the direct chip bonding at room temperature. - Takafumi Fukushima; Eiji Iwata; Jichoel Bea; Mariappan Murugesan; Kang Wook Lee 002; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2010)

Self-Assembly of Chip-Size Components with Cavity Structures: High-Precision Alignment and Direct Bonding without Thermal Compression for Hetero Integration. - Takafumi Fukushima; Takayuki Konno; Eiji Iwata; Risato Kobayashi; Toshiya Kojima; Mariappan Murugesan; Ji Chel Bea; Kang Wook Lee 002; Tetsu Tanaka; Mitsumasa Koyanagi (Micromachines, 2011)

Playful Engagement for Public Spaces: A Case Study on a Mall Escalator. - Koichi Araake; Michinari Kono; Eiji Iwata; Norio Sasaki (Proc. ACM Hum. Comput. Interact., 2021)