A video DSP with a macroblock-level-pipeline and a SIMD type vector-pipeline architecture for MPEG2 CODEC. - Masaki Toyokura; Hisashi Kodama; Eiji Miyagoshi; Koyoshi Okamoto; Masahiro Gion; Takayuki Minemaru; Akihiko Ohtani; Toshiyuki Araki; Hiroshi Takeno; Toshihide Akiyama; Brent Wilson 001; Kunitoshi Aono (IEEE J. Solid State Circuits, 1994)