An experimental 1.5-V 64-Mb DRAM. - Yoshinobu Nakagome; Hitoshi Tanaka; Kan Takeuchi; Eiji Kume; Yasushi Watanabe; Toru Kaga; Yoshifumi Kawamoto; Fumio Murai; Ryuichi Izawa; Digh Hisamoto; Teruaki Kisu; Takashi Nishida; et al. (IEEE J. Solid State Circuits, 1991)

VLSI reliability challenges: from device physics to wafer scale systems. - Eiji Takeda; Kunihiko Ikuzaki; Hisao Katto; Yuzuru Ohji; Kenji Hinode; Akemi Hamada; Toshiyuki Sakuta; Takahiro Funabiki; Toshio Sasaki (Proc. IEEE, 1993)

An experimental 220-MHz 1-Gb DRAM with a distributed-column-control architecture. - Takeshi Sakata; Masashi Horiguchi; Tomonori Sekiguchi; Shigeki Ueda; Hitoshi Tanaka; Eiji Yamasaki; Yoshinobu Nakagome; Masakazu Aoki; Toru Kaga; Makoto Ohkura; Ryo Nagai; Fumio Murai; et al. (IEEE J. Solid State Circuits, 1995)

An extended DEA model: Appending an additional input to make all DMUs at least weakly efficient. - Eiji Takeda (Eur. J. Oper. Res., 2000)

A method for multiple pseudo-criteria decision problems. - Eiji Takeda (Comput. Oper. Res., 2001)

Reliability issues of silicon LSIs facing 100-nm technology node. - Eiji Takeda; Eiichi Murakami; Kazuyoshi Torii; Yutaka Okuyama; Eishi Ebe; Kenji Hinode; Shin'ichiro Kimura (Microelectron. Reliab., 2002)

MCDA in Analyzing the Recycling Strategies in Malaysia. - Santha Chenayah; Agamuthu Periathamby; Eiji Takeda (OR, 2006)

Exploitation Procedure Based on eigenvector Revisited: the Concept of Weighted Preference Flows in multicriteria outranking Analysis. - Santha Chenayah; Eiji Takeda (Cybern. Syst., 2008)