RTL Design Framework for Embedded Processor by using C++ Description. - Eiji Yoshiya; Tomoya Nakanishi; Tsuyoshi Isshiki (DATE, 2021)

Design Verification Methodology of Pipelined RISC-V Processor Using C2RTL Framework. - Eiji Yoshiya; Tomoya Nakanishi; Tsuyoshi Isshiki (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2022)