Application of a redefinable symbolic simulation technique in VLSI testability design rules checking. - Mokhtar Hirech; Olivier Florent; Alain Greiner; El Housseine Rejouan (Annual Simulation Symposium, 1994)

A Redefinable Symbolic Simulation Technique to Testability Design Rules Checking. - Mokhtar Hirech; Olivier Florent; Alain Greiner; El Housseine Rejouan (EDAC-ETC-EUROASIC, 1994)